IP Library Granted Patent US 8,510,756
Granted Patent B1
US 8,510,756 · App. 11/951,934 · Granted Aug 13, 2013

Guest operating system code optimization for virtual machine

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Quick Facts
Patent No.
US 8,510,756
App. No.
11/951,934
Granted
Aug 13, 2013
Kind
B1
Abstract

A system, method and computer program product for increasing efficiency of Guest OS code in a Virtual Machine, including installing a driver (Guest Tool) in the Virtual Machine; upon detection of an event in the Virtual Machine that could require a context switch to a Virtual Machine Monitor (VMM), intercepting the event; analyzing the event for whether the event can be handled in the VM and without a context switch; for those events that can be handled natively in the VM, replacing selected instructions with other instructions that accomplish the same task but do not require a context switch; for those events that cannot be handled natively in the VM, transferring control to the VMM; handling the event in the VMM; and returning control to the VM.

Claims (38)

1. A method for increasing efficiency of guest operating system (OS) code in a Virtual Machine (VM) running under control of a Virtual Machine Monitor VMM), wherein the guest OS code includes unsafe instructions that force a processor to exit Virtual Machine context, the method comprising:

(a) entering a virtual machine hardware support mode of the processor;

(b) installing a code analysis routine that analyzes opcodes of instructions in the guest OS code;

(c) entering a VM context execution mode that fully virtualizes the processor;

(d) at run time, detecting presence of the opcodes of unsafe instructions in the guest OS code using the code analysis routine;

(e) executing natively, in the VM context, and without switching to the VMM, substitute instructions instead of at least some of the unsafe instructions; and

(f) resuming the guest OS code execution, after execution of the substitute instructions,

wherein the code analysis routine is implemented as a guest tool in a hypervisor or another virtual machine, and

wherein the guest tool implements the guest OS code parsing and modification using information about memory mapping of a guest OS kernel.

2. The method of claim 1 , wherein the code analysis routine runs in the VM context.

3. The method of claim 1 , wherein the code analysis routine parses the guest OS code to identify the unsafe instructions.

4. The method of claim 3 , further comprising modifying the guest OS code, wherein software debugging is used for the parsing and modification.

5. The method of claim 1 , wherein:

the code analysis routine is implemented as an exception handler; and

exceptions are triggered when the guest OS code instruction attempts to exit the processor's virtual machine hardware support mode.

6. The method of claim 1 , wherein the code analysis routine

(a) identifies, in the guest OS code, a predetermined pattern that includes unsafe instructions; and

(b) rolls back the effects of the unsafe instructions and any intervening instructions to ensure correct guest OS code context.

7. The method of claim 1 , wherein code analysis routine runs outside the VM context and performs the following operations:

(a) analyzes the guest OS code and detects patterns that include unsafe instructions;

(b) replaces the unsafe instructions in the patterns with breakpoints that raise exceptions;

(c) associates each pattern with a handler in the guest OS such that the handler:

(i) emulates the instructions in the patterns that raise the exceptions; and

(ii) rolls back effects of execution of any prior privileged but unsafe instruction that was executed in the VM context.

8. The method of claim 7 , further comprising inserting instructions that raise exceptions into the analyzed code, in proximity to the unsafe instructions.

9. The method of claim 7 , wherein the replaced instructions are emulated.

10. The method of claim 7 , wherein the replaced instructions are rolled back.

11. The method of claim 7 , wherein the replaced instructions are located in the guest OS code prior to the pattern.

12. A computer useable non-transitory recording medium having computer program logic stored thereon for executing on a processor, the computer program logic comprising computer code for implementing the method of claim 1 .

13. A system for increasing efficiency of guest OS code in a Virtual Machine (VM) running under control of a Virtual Machine Monitor (VMM), wherein the guest OS code includes unsafe instructions that force a processor to exit Virtual Machine context, the system comprising the processor, memory coupled to the processor, and computer code loaded into the memory that performs the following steps:

enters a virtual machine hardware support mode of the processor;

installs a code analysis routine that analyzes opcodes of instructions in the guest OS code;

enters a VM context execution mode that fully virtualizes the processor;

at run time, detects presence of the opcodes of unsafe instructions in the guest OS code using the code analysis routine; and

executes natively, in the VM context, and without switching to the VMM, substitute instructions instead of at least some of the unsafe instructions; and

(g) resumes the guest OS code execution, after execution of the substitute instructions,

wherein the code analysis routine is implemented as a guest tool driver in a hypervisor or another virtual machine, and

wherein the guest tool implements the guest OS code parsing and modification using information about memory mapping of a guest OS kernel.

Assignments (8)
RELEASE OF SECURITY INTEREST Recorded Jul 18, 2019
From: UBS AG, STAMFORD BRANCH, AS ADMINISTRATIVE AND COLLATERAL AGENT
To: COREL CORPORATION; CLEARSLIDE, INC.; PARALLELS INTERNATIONAL GMBH
Reel/Frame 049787/0073 →
RELEASE OF SECURITY INTEREST RECORDED AT : REEL 047973 FRAME 0797 Recorded Jul 17, 2019
From: UBS AG, STAMFORD BRANCH
To: PARALLELS INTERNATIONAL GMBH
Reel/Frame 049773/0590 →
SECURITY INTEREST Recorded Dec 21, 2018
From: PARALLELS INTERNATIONAL GMBH
To: UBS AG, STAMFORD BRANCH
Reel/Frame 047973/0797 →
MERGER Recorded Mar 6, 2018
From: PARALLELS IP HOLDINGS GMBH
To: PARALLELS INTERNATIONAL GMBH
Reel/Frame 045122/0592 →
RELEASE OF SECURITY INTEREST Recorded Dec 14, 2015
From: SILICON VALLEY BANK
To: PARALLELS HOLDINGS LTD. (F/K/A SWSOFT HOLDINGS LTD.)
Reel/Frame 037289/0685 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 31, 2011
From: PARALLELS SOFTWARE INTERNATIONAL, INC.
To: PARALLELS HOLDINGS, LTD.
Reel/Frame 027467/0328 →
SECURITY AGREEMENT Recorded Apr 3, 2010
From: PARALLELS HOLDINGS, LTD.
To: SILICON VALLEY BANK
Reel/Frame 024170/0853 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 6, 2007
From: KORYAKIN, ALEXEY B.; TORMASOV, ALEXANDER G.; KUZKIN, MAXIM A.; OMELYANCHUK, ANDREY A.; DOBROVOLSKIY, NIKOLAY N.
To: PARALLELS SOFTWARE INTERNATIONAL, INC.
Reel/Frame 020208/0221 →