Circuit topology for multiple loads
View Patent ↗A circuit topology for multiple loads includes a driving terminal, a first node coupled to the driving terminal and a second node via a first branch transmission line, a first receiving terminal which is a test point configured to detect errors of the circuit topology coupled to the first node via a second branch transmission line, a second and a third receiving terminal respectively coupled to the second node via a third branch transmission line and a fourth branch transmission line, wherein the difference between the length of the second branch transmitting line and that of the third branch transmitting line, and the difference between the length of the third branch transmitting line and that of the fourth branch transmitting line are greater than the product of a transmission speed and a rise time of the signal, and a first resistor is connected in the third branch transmission line.
1. A circuit topology for multiple loads comprising: a driving terminal; a first node coupled to the driving terminal via a main transmission line; a second node coupled to the first node via a first branch transmission line; a first receiving terminal coupled to the first node via a second branch transmission line; a second receiving terminal coupled to the second node via a third branch transmission line; a third receiving terminal coupled to the second node via a fourth branch transmission line, wherein a difference between a length of the second branch transmission line and that of the third branch transmission line is greater than a product of a transmission speed and a rise time of a signal, the difference between the length of the third branch transmission line and that of the fourth branch transmission line is greater than the product of the transmission speed and the rise time of the signal; and a first resistor connected in the third branch transmission line.
2. The circuit topology for multiple loads as claimed in claim 1 , further comprising a third node between the second node and the third receiving terminal, the third node coupled to a fourth terminal via a fifth branch transmission line, wherein a difference between a length of a branch transmission line from the third receiving terminal to the third node and a length of the fifth branch transmission line is no more than a product of the transmission speed and the rise time of a signal.
3. The circuit topology for multiple loads as claimed in claim 1 , wherein a resistance of the first resistor is set for impedance matching of the third branch transmission line.