IP Library Granted Patent US 8,054,066
Granted Patent B2
US 8,054,066 · App. 11/956,431 · Granted Nov 8, 2011

Magnetostrictive displacement transducer with phase shifted bias burst

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Quick Facts
Patent No.
US 8,054,066
App. No.
11/956,431
Granted
Nov 8, 2011
Kind
B2
Abstract

An assembly includes a magnetostrictive transducer that provides a transducer output. Amplifier circuitry receives the transducer output and generates a transducer output burst and a bias output burst. The transducer output burst and bias output burst overlap in time and differ by a phase difference. A burst processor receives the transducer output burst and the bias output burst. The burst processor provides a displacement output that is a function of a time when the transducer output burst and the bias output burst are at the same voltage level.

Claims (38)

1. An assembly, comprising:

a first magnetostrictive transducer providing a first transducer output;

amplifier circuitry that receives the first transducer output and that generates a transducer output burst and a bias output burst, the transducer output burst and the bias output burst overlapping one another in time and differing by a phase difference; and

a burst processor circuit that receives the transducer output burst and the bias output burst, and that provides a displacement output that is a function of a detection of a time when the transducer output burst and the bias output burst are at a same voltage level.

2. The assembly of claim 1 wherein the phase difference is substantially N +λ/2 where N is an integer greater than or equal to zero and λ is a period of a damped sinusoidal oscillation in the transducer output burst.

3. The assembly of claim 2 wherein N is 0 and the phase difference is substantially λ/2.

4. The assembly of claim 1 wherein the amplifier circuitry comprises an analog delay line that generates the phase difference.

5. The assembly of claim 1 wherein the amplifier circuitry comprises an inverter that generates the phase difference.

6. The assembly of claim 1 wherein the first magnetostrictive transducer provides a second transducer output that differs from the first transducer output by a phase difference and the second transducer output is coupled to the amplifier circuitry.

7. The assembly of claim 6 wherein the first magnetostrictive transducer comprises a center tapped winding that provides the first and second transducer outputs.

8. The assembly of claim 6 wherein the first magnetostrictive transducer comprises a first winding that produces the first transducer output and a second winding, electrically isolated from the first winding, that produces the second transducer output.

9. The assembly of claim 1 further comprising:

a second magnetostrictive transducer that provides a second transducer output to the amplifier circuitry, and

the second magnetostrictive transducer being separated from the first magnetostrictive transducer by a spacing that provides the phase difference.

10. An assembly, comprising:

a first magnetostrictive transducer providing a first transducer output;

amplifier circuitry that receives the first transducer output and that generates a transducer output burst and a bias output burst, the transducer output burst and bias output burst overlapping one another in time and differing by a phase difference;

a transducer circuit that receives the bias output burst and the transducer output burst, the transducer circuit providing a displacement output that is a function of a detection of a time when the transducer output burst and the bias output burst are at a same voltage level; and

a sequence circuit that receives the transducer output burst and that controls sequencing of the transducer circuit.

11. The assembly of claim 10 wherein the transducer circuit comprises a first comparator that compares the transducer output burst to the bias output burst, and the comparator generates a gate output that couples to the sequence circuit.

12. The assembly of claim 11 wherein the sequence circuit comprises a second comparator that compares the transducer output burst to a threshold voltage, and at least one one-shot circuit, and the second comparator triggers the at least one-shot circuit.

13. The assembly of claim 10 and further comprising a control bus that couples control between the transducer circuit and the sequence circuit.

14. The assembly of claim 10 wherein the amplifier circuitry comprises an analog delay line that generates the phase difference.

15. The assembly of claim 10 wherein the amplifier circuitry comprises an inverter that generates the phase difference.

16. The assembly of claim 10 wherein the first magnetostrictive transducer provides a second transducer output that differs from the first transducer output by a phase difference and the second transducer output is coupled to the amplifier circuitry.

17. The assembly of claim 10 further comprising:

a second magnetostrictive transducer that provides a second transducer output to the amplifier circuitry, and

the second magnetostrictive transducer being separated from the first magnetostrictive transducer by a spacing that provides the phase difference.

18. A method, comprising:

generating a transducer output from at least a first magnetostrictive transducer;

generating a transducer output burst as a function of the transducer output, and generating a bias output burst that overlaps the transducer output burst in time and differing by a phase difference from the transducer output burst; and

processing the transducer output burst to provide a displacement output that is a function of a detection of a time when the transducer output burst and the bias output burst are at a same voltage level.

19. The method of claim 18 wherein the phase difference is substantially N+λ/2 where N is an integer greater than or equal to zero and λ is a period of a damped sinusoidal oscillation in the transducer output burst.

20. The method of claim 19 wherein N is 0 and the phase difference is substantially λ/2.

21. An assembly, comprising:

at least a first magnetostrictive transducer providing a first transducer output;

amplifier circuitry that receives the first transducer output and that generates a transducer output burst and a bias output burst, the transducer output burst and bias output burst overlapping one another in time and differing by a phase difference; and

burst processor means for receiving the transducer output burst and the bias output burst, and for providing a displacement output that is a function of a detection of a time when the transducer output burst and the bias output burst are at a same voltage level.

Assignments (4)
RELEASE OF SECURITY INTEREST Recorded Apr 13, 2021
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MTS SYSTEMS CORPORATION
Reel/Frame 055911/0315 →
SUPPLEMENTAL CONFIRMATORY GRANT OF SECURITY INTEREST IN UNITED STATES PATENTS Recorded Jul 5, 2016
From: MTS SYSTEMS CORPORATION
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 039258/0587 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 7, 2011
From: VIOLA, UWE; ZUBENKO, VLADIMIR; SPRECHER, ARNOLD F.
To: MTS SYSTEMS CORPORATION
Reel/Frame 027183/0408 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 3, 2011
From: VIOLA, UWE; SPRECHER, ARNOLD F.
To: MTS SYSTEMS CORPORATION
Reel/Frame 027168/0131 →