Image sensor and method of fabricating the same
View Patent ↗An image sensor can include a gate insulation layer, a gate electrode, a photodiode, and a floating diffusion region. The gate insulation layer can be formed on and/or over a semiconductor substrate for a transfer transistor. The gate insulation layer includes a first gate insulation layer having a central opening and a second gate insulation layer formed on and/or over an uppermost surface of the first gate insulation layer including the opening. The gate electrode can be formed on and/or over the gate insulation layer. The photodiode can be formed in the semiconductor substrate at one side of the gate electrode so as to generate an optical charge. The floating diffusion region can be formed in the semiconductor at the other side of the gate electrode opposite to the photodiode. The floating diffusion region can be electrically connected to the photodiode through a channel so as to store the optical charge generated from the photodiode.
1. A method comprising:
depositing a first gate insulation material over a semiconductor substrate;
forming a first gate insulation layer having an opening at a center portion thereof by patterning the first gate insulation material;
sequentially depositing a second gate insulation material and a gate electrode material over the semiconductor substrate including the first gate insulation layer;
sequentially forming a second gate insulation layer and a gate electrode by patterning the second gate insulation material and the gate electrode material;
forming a photodiode in the semiconductor substrate at one side of the gate electrode by implanting a plurality of ions in the semiconductor substrate; and then
forming a floating diffusion region in the semiconductor substrate at another side of the gate electrode opposite to the photodiode by implanting ions into the semiconductor substrate.
2. The method of claim 1 , wherein the first gate insulation material comprises an oxide.
3. The method of claim 2 , wherein the second gate insulation material comprises an oxide.
4. The method of claim 3 , wherein the gate electrode material comprises polysilicon.
5. The method of claim 1 , wherein a thickness of the first gate insulation layer is greater than a thickness of the second gate insulation layer.
6. The method according to claim 5 , wherein the thickness of the first gate insulation layer is 28 Å.
7. The method according to claim 6 , wherein the thickness of the second gate insulation layer is 20 Å.
8. A method comprising:
forming a first gate insulation layer having an opening at a center portion thereof over a semiconductor substrate;
sequentially forming a second gate insulation layer and a gate electrode over the semiconductor substrate including the first gate insulation layer;
forming a photodiode in the semiconductor substrate laterally adjacent to one side of the gate electrode;
forming a floating diffusion region in the semiconductor substrate laterally adjacent to another side of the gate electrode opposite to the photodiode and then
forming a channel in the semiconductor substrate to electrically connect the floating diffusion region to the photodiode.
9. The method of claim 8 , wherein the photodiode is formed by implanting a plurality of ions in the semiconductor substrate.
10. The method of claim 8 , wherein the floating diffusion region is formed by implanting a plurality of ions in the semiconductor substrate.
11. The method of claim 8 , wherein the first gate insulation layer comprises an oxide material.
12. The method according to claim 11 , wherein the first gate insulation layer has a thickness of 28 Å.
13. The method of claim 8 , wherein the second gate insulation layer comprises an oxide material.
14. The method according to claim 8 , wherein the second gate insulation layer has a thickness of 20 Å.
15. The method of claim 8 , wherein the gate electrode comprises a polysilicon material.
16. The method of claim 8 , wherein a thickness of the first gate insulation layer is greater than a thickness of the second gate insulation layer.