IP Library Granted Patent US 7,696,088
Granted Patent B2
US 7,696,088 · App. 11/958,634 · Granted Apr 13, 2010

Manufacturing methods of metal wire, electrode and TFT array substrate

Assignee: Beijing BOE Optoelectronics Technology Co., Ltd.
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Quick Facts
Patent No.
US 7,696,088
App. No.
11/958,634
Granted
Apr 13, 2010
Kind
B2
Abstract

A method of forming a gate line and gate electrode and a method of manufacturing a TFT array substrate. The metal gate line and gate electrode can be formed by: providing a substrate, forming a photoresist layer on the substrate, a photoresist pattern being formed complementary with that of the gate line and gate electrode, forming a metal Cu thin film or a composite thin film comprising a metal Cu thin film on the substrate, and removing the photoresist pattern and the metal Cu thin film or composite thin film comprising the metal Cu thin film formed thereon from the substrate.

Claims (14)

1. A method of forming a gate line and gate electrode, comprising the steps of:

1) providing a substrate;

2) forming a photoresist layer on the substrate, a photoresist pattern being formed complementary with a pattern of the gate line and gate electrode, wherein the photoresist layer has a thickness in a range of about 1 to about 3 μm;

3) forming a metal Cu thin film or a composite thin film comprising a metal Cu thin film on the resulting substrate; and

4) removing the photoresist pattern and the metal Cu thin film or the composite thin film comprising the metal Cu thin film formed thereon from the resulting substrate, including immersing the resulting substrate into a lifting-off solution that comprises a mixture selected from the group consisting of a mixture of isopropanol and copper sulfate, a mixture of isopropanol, copper sulfite and sulfuric acid, and a mixture of isopropanol and sulfurous acid, wherein the content of the copper sulfate, the copper sulfite and sulfuric acid, and the sulfurous acid is less than about 5% by weight, so as to form the gate line and gate electrode comprising the metal Cu thin film or the composite thin film comprising the metal Cu thin film.

2. The method according to claim 1 , wherein the composite thin film comprising the metal Cu thin film comprises a first metal or metal compound blocking layer, the metal Cu thin film, and a second metal or metal compound blocking layer, that are stacked in this order.

3. A method of manufacturing a TFT array substrate, comprising a step of forming a gate line and gate electrode according to the method of claim 1 .

4. A method of forming a data line and source/drain electrodes, comprising the steps of:

1) providing a substrate with an active layer formed thereon;

2) forming a photoresist layer on the substrate, a photoresist pattern being formed complementary with a pattern of the data line and source/drain electrodes, wherein the photoresist layer has a thickness in a range of about 1 to about 3 μm;

3) forming a metal Cu thin film or a composite thin film comprising a metal Cu thin film on the resulting substrate; and

4) removing the photoresist pattern and the metal Cu thin film or the composite thin film comprising the metal Cu thin film formed thereon from the resulting substrate, including immersing the resulting substrate into a lifting-off solution that comprises a mixture selected from the group consisting of a mixture of isopropanol and copper sulfate, a mixture of isopropanol, copper sulfite and sulfuric acid, and a mixture of isopropanol and sulfurous acid, wherein the content of the copper sulfate, the copper sulfite and sulfuric acid, and the sulfurous acid is less than about 5% by weight, so as to form the data line and source/drain electrodes comprising the metal Cu thin film or the composite thin film comprising the metal Cu thin film.

5. The method according to claim 4 , wherein the composite thin film comprising the metal Cu thin film comprises a first metal or metal compound blocking layer, the metal Cu thin film, and a second metal or metal compound blocking layer, that are stacked in this order.

6. A method of manufacturing a TFT array substrate, comprising a step of forming a data line, and source and drain electrodes according to the method of claim 4 .

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 22, 2015
From: BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD
To: BOE TECHNOLOGY GROUP CO., LTD.; BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO. LTD
Reel/Frame 036644/0601 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 14, 2008
From: LONG, CHUNPING; LI, XINXIN
To: BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., INC
Reel/Frame 020509/0930 →
Priority Claims (1)
CN 2007 1 0063235 · Jan 4, 2007 · national
Continuity (1)
Related Publication 20080166838A1 · Jul 10, 2008