Transmitter and receiver
View Patent ↗A description is given of a transmitter including a baseband chip, a radio frequency chip and an interface unit coupling the baseband chip and the radio frequency chip. The radio frequency chip includes a modulation unit configured to modulate multiple data streams, wherein each of the data streams is assigned to a subcarrier having a frequency differing from the frequencies of the other subcarriers.
1. A transmitter, comprising:
a baseband chip;
a radio frequency chip; and
an interface unit coupling the baseband chip and the radio frequency chip,
wherein the baseband chip and the radio frequency chip are separate chips,
wherein the radio frequency chip comprises a modulation unit configured to modulate multiple digital data streams, wherein each of the digital data streams is assigned to a subcarrier having a frequency differing from the frequencies of the other subcarriers, and
wherein the baseband chip comprises a channel encoder, an interleaver, or both.
2. The transmitter of claim 1 , wherein the modulation unit is configured to modulate data using a phase modulation scheme, amplitude modulation scheme, or both.
3. The transmitter of claim 1 , wherein the radio frequency chip comprises an inverse Fourier Transformation unit configured to perform an inverse Fourier Transformation of the modulated data streams.
4. The transmitter of claim 3 , wherein the inverse Fourier Transformation unit outputs a multicarrier signal.
5. The transmitter of claim 1 , wherein the radio frequency chip comprises an inverse multiplexing unit configured to receive data from the interface unit and inversely multiplex the data into the multiple data streams.
6. The transmitter of claim 1 , wherein the interface unit is digital.
7. A receiver, comprising:
a baseband chip;
a radio frequency chip; and
an interface unit coupling the baseband chip and the radio frequency chip,
wherein the baseband chip and the radio frequency chip are separate chips,
wherein the radio frequency chip comprises a demodulation unit configured to demodulate multiple digital data streams, wherein each of the digital data streams is assigned to a subcarrier having a frequency differing from the frequencies of the other subcarriers, and
wherein the baseband chip comprises a channel decoder, a deinterleaver, or both.
8. The receiver of claim 7 , wherein the demodulation unit is configured to demodulate data using a phase demodulation scheme, an amplitude demodulation scheme, or both.
9. The receiver of claim 7 , wherein the radio frequency chip comprises an Fourier Transformation unit configured to perform a Fourier Transformation of a received multicarrier signal.
10. The receiver of claim 9 , wherein the Fourier Transformation unit outputs the multiple data streams.
11. The receiver of claim 7 , wherein the radio frequency chip comprises a multiplexing unit configured to multiplex data streams received from the demodulation unit into a data stream transmitted to the interface unit.
12. The receiver of claim 7 , wherein the interface unit is digital.
13. A transmitter, comprising:
a baseband chip;
a radio frequency chip; and
an interface unit coupling the baseband chip and the radio frequency chip,
wherein the baseband chip and the radio frequency chip are separate chips, and
wherein the radio frequency chip comprises a spreading unit configured to spread a data stream using a spreading code, and
wherein the baseband chip comprises a channel encoder, an interleaver, or both.
14. The transmitter of claim 13 , wherein the radio frequency chip comprises a scrambling unit configured to scramble a data stream using a scrambling code.
15. The transmitter of claim 13 , wherein the radio frequency chip comprises a modulation unit configured to modulate a data stream using a phase modulation scheme, an amplitude modulation scheme, or both.
16. The transmitter of claim 13 , wherein the interface unit is digital.
17. A receiver, comprising:
a baseband chip;
a radio frequency chip; and
an interface unit coupling the baseband chip and the radio frequency chip,
wherein the baseband chip and the radio frequency chip are separate chips,
wherein the radio frequency chip comprises a despreading unit configured to despread a data stream using a despreading code, and
wherein the baseband chip comprises a channel decoder, a deinterleaver, or both.
18. The receiver of claim 17 , wherein the despreading unit is comprised in a Rake structure.
19. The receiver of claim 17 , wherein the radio frequency chip comprises a descrambling unit configured to descramble a data stream using a descrambling code.
20. The receiver of claim 17 , wherein the radio frequency chip comprises a demodulation unit configured to demodulate a data stream using a phase demodulation scheme, an amplitude demodulation scheme, or both.
21. The receiver of claim 17 , wherein the interface unit is digital.
22. The transmitter of claim 1 , wherein the baseband chip and the radio frequency chip are implemented on physically separate substrates.
23. The transmitter of claim 1 , wherein the interface unit is configured to provide a logical channel for a transmission of at least one of payload data, control data and data for a timing of components comprised in at least one of the baseband chip and the radio frequency chip.
24. The transmitter of claim 1 , wherein the interface unit comprises differential pairs.
25. The transmitter of claim 1 , wherein the interface unit is configured to transmit data in a serial, digital or package oriented form.