Heterostructure device and associated method
View Patent ↗A heterostructure device includes a semiconductor multi-layer structure that has a first region, a second region and a third region. The first region is coupled to a source electrode and the second region is coupled to a drain electrode. The third region is disposed between the first region and the second region. The third region provides a switchable electrically conductive pathway from the source electrode to the drain electrode. The third region includes iodine ions. A system includes a heterostructure field effect transistor that includes the device.
1. A device, comprising:
a semiconductor multi-layer structure including a first layer comprising a buffer layer and a second layer comprising a barrier layer, the semiconductor multi-layer structure having a first region coupled to a source electrode, a second region coupled to a drain electrode, and a third region disposed between the first region and the second region, wherein the third region is coupled to a gate electrode and provides a switchable electrically conductive pathway from the source electrode to the drain electrode, and wherein the third region comprises iodine ions implanted into the barrier layer of the semiconductor multi-layer structure;
wherein the barrier layer comprises an epitaxially grown aluminum gallium nitride layer and the buffer layer comprises a gallium nitride layer; and
wherein the third region comprises iodine ions implanted into the aluminum gallium nitride layer so as to provide a switchable electrically conductive pathway from the source electrode to the drain electrode.
2. The device as defined as in claim 1 , wherein the multi-layer structure comprises an Al (x) Ga (1-x) N/Al (y) Ga (1-y) N layered heterostructure, and x and y are each a number from 0 to 1.
3. The device as defined as in claim 1 , wherein the switchable electrically conductive pathway defines a two-dimensional electron gas channel.
4. The device as defined as in claim 1 , wherein the third region is charge depleted.
5. The device as defined as in claim 1 , wherein the iodine ions implanted into the barrier layer of the semiconductor multi-layer structure deplete a charge within the switchable electrically conductive pathway.
6. The device as defined as in claim 1 , wherein the concentration of the iodine ions in the third region is in a range of from about 1×10 13 cm −3 to about 1×10 15 cm −3 .
7. The device as defined as in claim 1 , wherein the barrier layer of the semiconductor multi-layer structure comprises an annealed layer.
8. The device as defined as in claim 1 , wherein the iodine ions are implanted into a body of the barrier layer.
9. The device as defined as in claim 1 , wherein the source electrode and the drain electrode comprise sputtered metal electrodes.
10. The device as defined as in claim 1 , wherein the epitaxially grown aluminum gallium nitride layer has a thickness of 100 Angstroms.
11. A semiconductor device comprising:
a semiconductor multi-layer structure having a plurality of semiconductor layers, the semiconductor multi-layer structure comprising:
a gallium nitride layer; and
an aluminum gallium nitride layer disposed on the gallium nitride layer;
a source electrode positioned on the semiconductor multi-layer structure at a first region of the aluminum gallium nitride layer;
a drain electrode positioned on the semiconductor multi-layer structure at a second region of the aluminum gallium nitride layer; and
a gate electrode positioned on the semiconductor multi-layer structure at a third region of the aluminum gallium nitride layer, the third region being disposed between the first region and the second region;
wherein the third region of the aluminum gallium nitride layer comprises iodine ions implanted into the aluminum gallium nitride layer so as to provide a switchable electrically conductive pathway from the source electrode to the drain electrode.
12. The semiconductor device of claim 11 wherein the semiconductor multi-layer structure has a bandgap of greater than 2 electronvolts.
13. The semiconductor device of claim 11 wherein the third region of the aluminum gallium nitride layer further comprises ions of chlorine, bromine, fluorine, or a combination of two or more thereof.
14. The semiconductor device of claim 11 wherein the iodine ions are implanted into a body of the aluminum gallium nitride layer.
15. The semiconductor device of claim 11 wherein the aluminum gallium nitride layer has a thickness of 100 Angstroms.
16. The semiconductor device of claim 11 wherein the source electrode and the drain electrode comprise sputtered metal electrodes.
17. The semiconductor device of claim 11 wherein the switchable electrically conductive pathway defines a two-dimensional electron gas channel.