FIELD EFFECT TRANSISTOR DEVICE AND METHOD OF PRODUCING THE SAME
A semiconductor device is disclosed. In one aspect, the device comprises a channel area, the channel area comprising a channel layer in which charge carriers can move when the transistor is turned on, in order to pass a current through the transistor. The device further comprises a source area and a drain area contacting the channel layer for providing current to and from the channel layer. The method further comprises a gate electrode, preferably provided with a gate dielectric between the gate electrode and the channel layer. The channel layer may comprise a III-V material, and the source and drain areas comprise SiGe, being SixGe1-x, with x between 0 and 100%, arranged so that heterojunctions are present between III-V material and SiGe, wherein the heterojunctions are oriented so as to intersect with the gate dielectric or the gate electrode.
1 . A semiconductor transistor device comprising:
a channel area comprising a channel layer in which charge carriers move when the transistor is turned on, in order to pass a current through the transistor;
a source area and a drain area, contacting the channel layer for providing current to and from the channel layer; and
a gate electrode;
wherein the channel layer comprises a III-V material, and the source and drain areas comprise SiGe, being Si x Ge 1−x , with x between 0 and 100%, arranged so that heterojunctions are present between III-V material and SiGe, the heterojunctions being arranged so that current passes through the heterojunctions, wherein the heterojunctions are oriented so as to intersect with the gate electrode.
2 . The device according to claim 1 , further comprising a substrate, the substrate comprising a top layer of the III-V material, and wherein two openings are present in the top layer, and wherein the openings have been filled with SiGe, to form the source and drain areas.
3 . The device according to claim 1 , further comprising a substrate, wherein the substrate comprises a top layer of SiGe, and wherein an opening is present in the top layer, and wherein the opening has been filled with III-V material, to form the channel area.
4 . The device according to claim 1 , wherein the III-V material is chosen from the following group: GaAs, AlP, GaP, AlAs, InGaNAs, InGaAs, InP and AlSb.
5 . The device according to claim 1 , wherein the source and/or drain area are provided with a contact portion comprising a metal germanide and/or silicide.
6 . The device of claim 5 , wherein the contact portion consists essentially of a metal germanide and/or silicide.
7 . The device according to claim 1 , wherein the device is a MOSFET.
8 . The device according to claim 1 , wherein the device is a HEMT.
9 . The device according to claim 1 , further comprising a gate dielectric between the gate electrode and the channel layer, wherein the heterojunctions are oriented so as to intersect with the gate dielectric.
10 . The device according to claim 1 , wherein the channel layer consists essentially of a III-V material.
11 . The device according to claim 1 , wherein x is less than 100%.
12 . The device according to claim 1 , wherein x is less than 90%.
13 . The device according to claim 1 , wherein x is less than 80%.
14 . The device according to claim 1 , wherein x is less than 70%.
15 . A method of producing a semiconductor device, the method comprising:
providing a substrate having a top layer comprising a III-V material;
by a photolithographic technique, etching back two cavities in the III-V layer, to form a channel area in between the cavities; and
filling the cavities with SiGe, to form source and drain areas in contact with the channel area.
16 . A method of producing a semiconductor device, the method comprising:
providing a substrate having a top layer comprising SiGe;
by a photolithographic technique, etching back a cavity in the SiGe layer for forming a channel area; and
filling the cavity with III-V material to form the channel area.
17 . A semiconductor device comprising:
a channel layer; and
heterojunctions are formed between III-V material and SiGe, the heterojunctions are arranged so that current flowing through the channel layer passes through the heterojunctions.
18 . A semiconductor device comprising:
a channel layer; and
heterojunctions oriented toward the channel layer, the heterojunctions being arranged so that current flowing through the channel passes through the heterojunctions.
19 . The semiconductor device according to claim 18 , wherein the heterojunctions are approximately perpendicular to the channel layer.