IP Library Granted Patent US 7,863,964
Granted Patent B2
US 7,863,964 · App. 11/964,886 · Granted Jan 4, 2011

Level shifting switch driver on GaAs pHEMT

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,863,964
App. No.
11/964,886
Granted
Jan 4, 2011
Kind
B2
Abstract

A radio frequency semiconductor switching device (S) is formed on an MMIC structure (C) including a switching circuit element ( 12 ) having four semiconductor switching units ( 68, 70 ) with each adapted for receiving a gate control signal. A level shift circuit ( 10 ) generates a biasing voltage signal communicated of the switching units ( 68, 70 ) for biasing the switching units ( 68 ), and provides an output that swings between approximately one diode drop above ground and a negative voltage to bias the switching circuit elements ( 68 and 70 ) for reduced loss. The level shift circuit ( 10 ) is responsive to an externally provided control signal ( 58 ). The switching units ( 68, 70 ) are formed into a grouping of at least, a first and a second set ( 76, 78 ) of interconnected semiconductor switching units ( 68, 70 ) with each set ( 76, 78 ) having gates of at least two of the interconnected switching units ( 68, 70 ) connected with the level shift circuit output ( 60, 62 ). Both the switching units ( 68, 70 ) and the level shift circuit ( 10 ) are formed on the MMIC structure (C).

Claims (16)

1. A radio frequency semiconductor switching device suitable for driving electronic circuits of the type including depletion mode MESFET, pHemt, or JFET elements formed on a monolithic microwave integrated circuit (MMIC) structure comprising:

a switching circuit element including at least four electronic semiconductor component switching units with each switching unit adapted for receiving a gate input signal at a gate electrode of the semiconductor switching units;

a level shift circuit generating a biasing voltage signal electrically communicating with the gate electrodes of the switching units for biasing the gate electrodes of the switching units where such bias voltage swings positive with respect to ground by an amount determined by an on MMIC diode to bias the switching units into a lower loss state; the level shift circuit being responsive to an externally provided control signal;

the semiconductor switching units being formed into a grouping of at least a first and a second set of interconnected semiconductor switching units with each set of interconnected semiconductor switching units having respective gate electrodes of at least two of the interconnected switching units in the set of interconnected switching units being electrically connected with an output source of the level shift circuit; and,

both the switching units and the level shift circuit being formed on the MMIC structure.

2. The invention of claim 1 wherein the level shift circuit further includes one or more on MMIC diodes for offsetting a source voltage of the control devices so they can fully switch OFF in response to an input control signal that swings between ground and a negative supply rail.

3. The invention of claim 1 wherein two of the semiconductor switching units form a shunt element for biasing the switching elements by providing a positive voltage to the gate when the respective switching unit is in an on state.

4. The invention of claim 1 wherein the switching units comprise pseudomorphic high electron mobility transistors (pHemt).

5. The invention of claim 1 wherein the switching units comprise a depeletion mode, diode gate RF switching device of the type including pHemt, MESFET of SIT devices fabricated in materials of the type including GaAs, GaN, SiC or other comparable materials.

6. A method for switching an input signal at radio frequencies suitable for driving electronic circuits of the type including depletion mode MESFET, pHemt, or JFET elements on a monolithic microwave integrated circuit (MMIC) structure including the steps of:

generating a biasing voltage signal at an output source of a level shift circuit and electrically communicating the voltage signal with gate electrodes of switching units for biasing the gate electrodes of the switching units where such bias voltage swings positive with respect to ground by an amount determined by an on MMIC diode to bias the switching units into a lower loss state; the level shift circuit being responsive to an externally provided control signal; the level shift circuit further includes one or more on MMIC diodes for offsetting a source voltage of the control devices so they can fully switch OFF in response to an input control signal that swings between ground and a negative supply rail; and,

biasing with the biasing voltage signal at least four electronic semiconductor component switching units with each switching unit adapted for receiving a gate input signal at a gate electrode of the semiconductor switching units;

whereby the semiconductor switching units are formed into a grouping of at least a first and a second set of interconnected semiconductor switching units with each set of interconnected semiconductor switching units having respective gate electrodes of at least two of the interconnected switching units in the set of interconnected switching units being electrically connected with an output source of the level shift circuit.

7. The method of claim 6 wherein both the switching units and the level shift circuit being formed on the MMIC structure.

8. The method of claim 6 wherein two of the semiconductor switching units form a shunt element for biasing the switching elements by providing a positive voltage to the gate when the respective switching unit is in an on state.

9. The method of claim 6 wherein the switching units comprise pseudomorphic high electron mobility transistors (pHemt).

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 7, 2011
From: NORTHROP GRUMMAN CORPORATION
To: NORTHROP GRUMMAN SYSTEMS CORPORATION
Reel/Frame 025597/0505 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 27, 2007
From: SUKO, SCOTT K.; PASSERELLI, ANDREW R.; NACHTREIB, GREGORY D.
To: NORTHROP GUMMAN SYSTEMS CORPORATION
Reel/Frame 020292/0199 →