Pixel structure having a second TFT electrically connected to a coupling electrode formed over and electrically insulated from the data line
View Patent ↗A pixel structure including a scan line, a data line, a first sub-pixel, a coupling electrode and a second sub-pixel is provided. The first sub-pixel includes a first thin film transistor (TFT) and a first pixel electrode, and the first pixel electrode is electrically connected to the scan line and the data line via the first TFT. The coupling electrode is disposed above the data line and electrically insulated from the data line. The second sub-pixel includes a second thin film transistor and a second pixel electrode. The second pixel electrode is electrically connected to the second TFT, and the second TFT is electrically connected to the coupling electrode. When seeing an image from a slant direction, color shift of image can be solved by utilizing the pixel structure. Besides, a liquid crystal display panel having the described pixel structure is also provided.
1. A pixel structure, comprising:
a scan line and a data line;
a first sub-pixel, comprising:
a first thin film transistor;
a first pixel electrode, electrically connected to the scan line and the data line via the first thin film transistor;
a coupling electrode, disposed over the data line and electrically insulated from the data line; and
a second sub-pixel, comprising:
a second thin film transistor;
a second pixel electrode, electrically connected to the second thin film transistor, the second thin film transistor being electrically connected to the coupling electrode;
wherein, the scan line divides the pixel structure into the first sub-pixel and the second sub-pixel; and parts of the scan line are gates of the first and second thin film transistors.
2. The pixel structure of claim 1 , wherein a channel of the first thin film transistor has a first width-to-length ratio, a channel of the second thin film transistor has a second width-to-length ratio, and the first width-to-length ratio is substantially equal to the second width-to-length ratio.
3. The pixel structure of claim 1 , wherein an area ratio of the first sub-pixel to the second sub-pixel is in the range from 1:1 to 1:2.
4. The pixel structure of claim 1 , wherein the first pixel electrode and the second pixel electrode further comprise an alignment slit pattern.
5. The pixel structure of claim 1 , further comprising an alignment protrusion pattern formed on the first pixel electrode and the second pixel electrode.
6. The pixel structure of claim 1 , further comprising a common electrode disposed below the first pixel electrode and the second pixel electrode.
7. The pixel structure of claim 1 , wherein the material of the coupling electrode comprises a transparent conductive material.
8. A liquid crystal display panel, comprising:
a thin film transistor array substrate having a plurality of pixel structures, each pixel structure comprising:
a scan line and a data line;
a first sub-pixel comprising:
a first thin film transistor;
a first pixel electrode electrically connected to the scan line and the data line via the first thin film transistor;
a coupling electrode disposed over the data line;
a second sub-pixel comprising:
a second thin film transistor;
a second pixel electrode electrically connected to the second thin film transistor, the second thin film transistor electrically connected to the coupling electrode, wherein, the scan line divides the pixel structure into the first sub-pixel and the second sub-pixel; and parts of the scan line are gates of the first and second thin film transistors;
a color filter substrate disposed opposite to the thin film transistor array substrate; and
a liquid crystal layer interposed between the thin film transistor array substrate and the color filter substrate.
9. The liquid crystal display panel of claim 8 , wherein a channel of the first thin film transistor has a first width-to-length ratio, a channel of the second thin film transistor has a second width-to-length ratio, and the first width-to-length ratio is substantially equal to the second width-to-length ratio.
10. The liquid crystal display panel of claim 8 , wherein an area ratio of the first sub-pixel to the second sub-pixel is in the range from 1:1 to 1:2.
11. The liquid crystal display panel of claim 8 , wherein the first pixel electrode and the second pixel electrode of the pixel structure further comprise an alignment slit pattern.
12. The liquid crystal display panel of claim 8 , wherein the thin film transistor array substrate further comprises an alignment protrusion pattern formed on the first pixel electrode and the second pixel electrode.
13. The liquid crystal display panel of claim 8 , wherein the color filter substrate further comprises an alignment protrusion pattern formed thereon.
14. The liquid crystal display panel of claim 8 , wherein the color filter substrate further comprises an alignment slit pattern formed thereon.
15. The liquid crystal display panel of claim 8 , wherein each pixel structure further comprises a common electrode formed below the first pixel electrode and the second pixel electrode.
16. The liquid crystal display panel of claim 8 , wherein the color filter substrate further comprises a common electrode layer.
17. The liquid crystal display panel of claim 8 , wherein the material of the coupling electrode comprises a transparent conductive material.