IP Library Granted Patent US 7,825,482
Granted Patent B2
US 7,825,482 · App. 11/969,514 · Granted Nov 2, 2010

Semiconductor device and method for fabricating the same

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Quick Facts
Patent No.
US 7,825,482
App. No.
11/969,514
Granted
Nov 2, 2010
Kind
B2
Abstract

A semiconductor device includes: an isolation region formed in a semiconductor substrate; a first active region and a second active region surrounded by the isolation region; an n-type gate electrode and a p-type gate electrode formed on gate insulating films; an insulating film and a silicon region formed on the isolation region and isolating the n-type gate electrode and the p-type gate electrode from each other; and a metal silicide film formed on the upper surfaces of the n-type gate electrode, the silicon region, the p-type gate electrode, and part of the insulating film formed therebetween. The n-type gate electrode is electrically connected to the p-type gate electrode through the metal silicide film.

Claims (28)

1. A semiconductor device comprising:

a semiconductor substrate;

an isolation region formed in the semiconductor substrate;

a first active region surrounded by the isolation region and formed of the semiconductor substrate;

a second active region surrounded by the isolation region and formed of the semiconductor substrate;

a first gate insulating film formed on the first active region;

a second gate insulating film formed on the second active region;

a first gate electrode of a first conductivity type made of silicon and formed on the first gate insulating film;

a second gate electrode of a second conductivity type made of silicon and formed on the second gate insulating film;

an insulating film formed on an upper surface of a part of the isolation region located between the first active region and the second active region, and sandwiched between the first gate electrode and the second gate electrode so as to have a recess-like cross section in the gate width direction and being made of a single film;

a silicon region surrounded by the insulating film and formed in a recess; and

a metal silicide film formed on the respective tops of the first gate electrode, the second gate electrode, the silicon region, and the insulating film,

wherein the first gate electrode is electrically connected to the second gate electrode through the metal silicide film, and

the first and second gate electrodes are separated by the insulating film and the silicon region.

2. The semiconductor device of claim 1 , wherein the side faces of the first and second gate electrodes located on the isolation region form a forward tapered shape with respect to the isolation region.

3. The semiconductor device of claim 1 , wherein the insulating film is an oxide film or a nitride film.

4. The semiconductor device of claim 1 , wherein the insulating film is formed in contact with the upper surface of the isolation region.

5. The semiconductor device of claim 1 , wherein the insulating film has a thickness of 5-15 nm.

6. The semiconductor device of claim 1 , wherein the metal silicide film is made of cobalt silicide.

7. The semiconductor device of claim 1 , wherein the first and second gate electrodes are made of a same polysilicon material.

8. The semiconductor device of claim 1 , wherein

the first gate electrode is made of polysilicon doped with n-type impurities,

the second gate electrode is made of polysilicon doped with p-type impurities, and

the silicon region is made of polysilicon doped with n-type and p-type impurities.

9. The semiconductor device of claim 1 , wherein the top of the insulating film is located higher than upper surfaces of the first and second gate electrodes.

10. The semiconductor device of claim 1 , wherein part of the metal silicide film located on the top of the insulating film has a smaller thickness than part of the metal silicide film located on upper surfaces of the first and second gate electrodes.

11. The semiconductor device of claim 1 , wherein the first and second gate insulating films are made of a same silicon oxide material.

12. The semiconductor device of claim 1 , wherein the silicon region is isolated from the first gate electrode and the second electrode by the insulating film.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 7, 2015
From: PANASONIC CORPORATION
To: PANNOVA SEMIC, LLC
Reel/Frame 036065/0273 →
CHANGE OF NAME Recorded Nov 20, 2008
From: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
To: PANASONIC CORPORATION
Reel/Frame 021897/0516 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 11, 2008
From: OKAZAKI, GEN; SEBE, AKIO
To: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
Reel/Frame 020790/0212 →