Differential impedance matching circuit and method with harmonic suppression
View Patent ↗Matching network circuits and a method are shown for suppressing a harmonic frequency in a matching network. The circuits and method involve impedance matching first and second differential input nodes to a single ended output node using a first reactive impedance selected to pass a resonant frequency. They also involve suppressing a harmonic frequency of a common mode signal presented at the first and second differential input nodes by providing a series resonance from the first and second differential input nodes to a radio frequency ground potential, where the series resonance is selected to pass the harmonic frequency to the radio frequency ground potential.
1. A matching network, the network comprising:
first and second differential input nodes and a single ended output node;
a first inductor coupled between the first differential input node and a common circuit node;
a second inductor coupled between the second differential input node and the common circuit node;
a third inductor coupled between a first power supply rail and the common circuit node;
a first capacitor coupled between the first differential input node and the single ended output node;
a second capacitor coupled between the second differential input node and a radio frequency ground node;
a fourth inductor coupled between the second differential input node and the single ended output node;
a third capacitor coupled between the common circuit node and the radio frequency ground node, where a capacitance of the third capacitor is selected to provide second harmonic suppression of a common mode signal present at the first and second differential input nodes.
2. The matching network of claim 1 , where the radio frequency ground node further comprises a power supply rail.
3. A method for suppressing a harmonic frequency in a matching network, the method comprising the steps of:
impedance matching first and second differential input nodes to a single ended output node using a first reactive impedance selected to pass a resonant frequency; and
suppressing a harmonic frequency of a common mode signal presented at the first and second differential input nodes by providing a series resonance from the first and second differential input nodes to a radio frequency ground potential through a series resonance circuit, where the series resonance is selected to pass the harmonic frequency to the radio frequency ground potential;
wherein the series resonance circuit comprises:
a first inductor coupled between the first differential input node and a common circuit node,
a second inductor coupled between the second differential input node and the common circuit node, and
a first capacitor coupled between the common circuit node and the radio frequency ground node; and
wherein the matching network further comprises:
a third inductor coupled between a first power supply rail and the common circuit node,
a second capacitor coupled between the first differential input node and the single ended output node,
a third capacitor coupled between the second differential input node and a radio frequency ground node, and
a fourth inductor coupled between the second differential input node and the single ended output node.