Data processing system, method for executing a cryptographic algorithm and method for preparing execution of a cryptographic algorithm

1. A data processing system comprising:

a memory configured to store confidential data and non-confidential data;

a cache memory which is configured to cache data stored in the memory and which comprises a first cache memory region and a second cache memory region;

a pre-calculation circuit configured to pre-calculate data based on the cryptographic data to be used in a cryptographic algorithm, wherein the pre-calculated data are data which are to be used in course of the execution of the cryptographic algorithm in an order that is characteristic for a cryptographic key used in the cryptographic algorithm, and wherein the execution time of the cryptographic algorithm is independent of the order of the pre-calculated data;

an initializing circuit configured to store the pre-calculated data in the second cache memory region;

a processing circuit configured to carry out, in a confidential state of the data processing system, a cryptographic algorithm which operates on the confidential data and on the non-confidential data, wherein the confidential data are cached using the first cache memory region and the non-confidential data are cached using the second cache memory region; and

an invalidating circuit configured to invalidate the first cache memory region when the data processing system switches from the confidential state into a non-confidential state.

2. The data processing system according to claim 1 , further comprising an access control circuit configured to grant access to the confidential data stored in the memory in the confidential state but prevent access to the confidential data stored in the memory in the non-confidential state.

3. The data processing system according to claim 1 , further comprising a locking circuit configured to lock the second cache memory region in which the pre-calculated data is stored such that association of cache lines of the second cache memory region with the parts of memory they are used for caching does not change during the execution of the cryptographic algorithm.

4. The data processing system according to claim 1 , further comprising a state switching control circuit configured to switch the data processing system from the confidential state into the non-confidential state when there is a request for interruption of the cryptographic algorithm.

5. The data processing system according to claim 4 , wherein the request is a real-time event.

6. The data processing system according to claim 1 , wherein the data processing system is a real-time data processing system.

7. The data processing system according to claim 1 , wherein the cryptographic algorithm is the RSA algorithm.

8. The data processing system according to claim 1 , wherein the pre-calculated data comprises a plurality of data elements and the order in which the data elements are to be used in course of the cryptographic algorithm is characteristic for the cryptographic key.

9. The data processing system according to claim 8 , wherein the cryptographic key comprises a plurality of symbols, each symbol corresponds to one data element of the pre-calculated data, each symbol of the cryptographic key is processed during the cryptographic algorithm and when a symbol of the cryptographic key is processed, the corresponding data element of the pre-calculated data is to be used.

10. The data processing system according to claim 9 , wherein each symbol is a block of one or more bits.