IP Library Granted Patent US 8,396,112
Granted Patent B2
US 8,396,112 · App. 11/975,339 · Granted Mar 12, 2013

Circuitry and method for transferring data, and circuitry and method utilizing clock pulses

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Quick Facts
Patent No.
US 8,396,112
App. No.
11/975,339
Granted
Mar 12, 2013
Kind
B2
Abstract

A variable power supply voltage generator generates a variable power supply voltage Vvar and supplies it to other circuits. A transmitting circuit 130 (or 140 ), operative at the variable power supply voltage Vvar, generates multi-value analog signals Smulti and transmits them to other circuits. A receiving circuit 140 (or 130 ), operative at the variable power supply voltage Vvar, receives the multi-value analog signals Smulti and subjects them to A/D conversion to generate multi-value digital signals. The threshold voltage generator generates threshold voltages used for A/D conversion from the variable power supply voltage Vvar or from a signal having a voltage value proportional to that of the variable power supply voltage Vvar and supplies them to the receiving circuit. An analog clock generator 120 generates an analog clock signal having a cyclical analog waveform. In response to the analog clock signal, a clock pulse generator 150 generates a clock pulse signal having a cycle period of 1/N of the cycle period of the analog clock signal. The clock-synchronous circuits 130, 140 operate synchronously with the clock pulse signals generated by the clock pulse generator 150.

Claims (34)

1. A circuitry for transferring data, comprising:

a variable power supply voltage generator for generating a variable power supply voltage;

a transmitting circuit operative at the variable power supply voltage for generating a multi-value analog signal and transmitting the multi-value analog signal to other circuits;

a receiving circuit operative at the variable power supply voltage for receiving the multi-value analog signal and performing A/D conversion to re-generate a multi-value digital signal; and

a threshold voltage generator for generating threshold voltages used for the A/D conversion and supplying the threshold voltages to the receiving circuit, the threshold voltages being generated from the variable power supply voltage or from a signal having a voltage value proportional to the variable power supply voltage.

2. The circuitry according to claim 1 , further comprising:

a sine wave clock generator for generating a sine wave clock signal and sending the sine wave signal to the transmitting circuit and the receiving circuit, the sine wave clock signal having a cycle period that increases as the variable power supply voltage decreases,

wherein the transmitting circuit and the receiving circuit respectively generate a clock pulse signal having a cycle period equal to 1/N of the cycle period of the sine wave clock signal where N is a value of 2 or greater, and perform operations in synchronism with the clock pulse signal.

3. The circuitry according to claim 2 , wherein

the sine wave clock signal has a peak voltage proportional to the variable power supply voltage, and

the threshold voltage generator generates the threshold voltages based on the peak voltage of the sine wave clock signal.

4. A device comprising the circuitry according to claim 1 .

5. The device according to claim 4 , wherein the device is a mobile appliance.

6. The device according to claim 4 , wherein the device is a moving body.

7. A circuitry that uses clock pulses, comprising:

an analog clock generator for generating an analog clock signal having a cyclical analog waveform;

a clock pulse generator for generating, responsive to the analog clock signal, a clock pulse signal having a cycle period equal to 1/N of a cycle period of the analog clock signal where N is a value of 2 or greater; and

a clock-synchronous circuit operative in synchronism with the clock pulse signal;

wherein the analog clock generator is operative to change the cycle period of the analog clock signal, and

the cycle period of the clock pulse signal is changed according to the change in the cycle period of the analog clock signal.

8. The circuitry according to claim 7 , comprising a plurality of the clock-synchronous circuits including first and second clock-synchronized circuits, wherein the clock pulse generator is disposed in each clock-synchronous circuit.

9. The circuitry according to claim 8 , wherein the value N is established independently for each clock pulse generator.

10. The circuitry according to claim 8 , wherein

the first clock-synchronous circuit includes a multi-value analog signal generator for generating a multi-value analog signal that represents digital values to be transmitted to the second clock-synchronous circuit, the multi-value analog signal generator being operative in synchronism with a first clock pulse signal generated by a first clock pulse generator that is disposed for the first clock-synchronous circuit, and

the second clock-synchronous circuit includes a multi-value digital signal generator for converting the multi-value analog signal into a multi-value digital signal, the multi-value digital signal generator being operative in synchronism with a second clock pulse signal generated by a second clock pulse generator that is disposed for the second clock-synchronous circuit.

11. The circuitry according to claim 7 , wherein the analog clock signal has a sine wave waveform.

12. A device comprising the circuitry according to claim 7 .

13. The device according to claim 12 , wherein the device is a mobile appliance.

14. The device according to claim 12 , wherein the device is a moving body.

15. A method for generating clock pulses, comprising the steps of:

(a) generating an analog clock signal having a cyclical analog sine wave waveform, and

(b) generating, response to the analog clock signal, a clock pulse signal having a cycle period equal to 1/N of a cycle period of the analog clock signal where N is a value of 2 or greater,

wherein the generation of the analog clock signal is operative to change the cycle period of the analog clock signal, and

the cycle period of the clock pulse signal is changed according to the change in the cycle period of the analog clock signal.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 20, 2021
From: PARKSIDE IP LLC
To: WIESBLATT LICENSING LLC
Reel/Frame 056915/0852 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 14, 2020
From: GODO KAISHA IP BRIDGE 1
To: PARKSIDE IP LLC
Reel/Frame 053196/0829 →