Stacked film including a semiconductor film having a taper angle, and thin film transistor including the stacked film
View Patent ↗A method for forming a pattern of a stacked film, includes steps (a) to (e). The step (a) is forming sequentially a first base insulating film and a light shielding material on a transparent substrate. The step (b) is patterning the light shielding material to obtain a light shielding film with a first pattern. The step (c) is forming sequentially a second base insulating film, a semiconductor film and a first oxide film on a substrate. The step (d) is forming a resist pattern with a second pattern on the first oxide film. The step (e) is forming a pattern of a stacked film by dry etching the first oxide film and the semiconductor film, above the light shielding film. The stacked film includes the semiconductor film and the first oxide film. The dry etching includes an etching by using an etching gas and the resist pattern as a mask. The semiconductor film includes a taper angle which is controlled to be within predetermined range.
1. A stacked film for a thin film transistor, said stacked film comprising:
a semiconductor film which comprises an active layer of said thin film transistor, and is formed on a base insulating film and includes a taper angle in the range from 40° to 60° ; and
a first oxide film which is formed on said semiconductor film,
wherein said base insulating film is formed on a transparent substrate and includes a patterned light shielding film and a film formed between said patterned light shielding film and said semiconductor film which includes a thickness between 100 nm and 500 nm.
2. The stacked film of claim 1 , wherein said thin film transistor comprises a gate insulating film formed on said stacked film, and a gate line formed on said gate insulating film.
3. The stacked film of claim 2 , wherein said semiconductor film comprises a channel region, said gate line being formed on said gate insulating film above said channel region.
4. The stacked film of claim 3 , wherein said semiconductor film comprises:
lightly doped drain (LDD) regions formed on opposing sides of said channel region; and
source and drain regions which are formed outside said LDD regions on opposing sides of said channel region, and comprise a sidewall including said taper angle.
5. The stacked film of claim 1 , wherein said taper angle comprises a taper angle with respect to a plane of said transparent substrate.
6. The stacked film of claim 1 , wherein said taper angle comprises a taper angle of opposing sidewalls of said semiconductor film.
7. The stacked film of claim 6 , wherein opposing sidewalls of said first oxide film include a taper angle in the range from 40° to 60°, and are formed adjacent to said opposing sidewalls of said semiconductor film.
8. The stacked film of claim 1 , wherein said taper angle is formed around an entire periphery of said semiconductor film, and said first oxide film includes a taper angle which is formed around an entire periphery of said first oxide film.
9. The stacked film of claim 1 , wherein said light shielding film comprises a conductive film and shields light from under the transparent substrate.
10. The stacked film of claim 1 , wherein said light shielding film comprises plural layers.
11. The stacked film of claim 1 , wherein a width of said light shielding film is substantially the same as a width of said semiconductor film.
12. The stacked film of claim 1 , wherein a distance between said light shielding film and said semiconductor film is equal to a thickness of said base insulating film.
13. The stacked film of claim 1 , wherein said film formed between said patterned light shielding film and said semiconductor film comprises an SiO 2 film.
14. The stacked film of claim 1 , wherein the semiconductor film is formed on a surface of the film formed between said patterned light shielding film and said semiconductor film, and
wherein said base insulating film comprises an other film formed on a surface of the transparent substrate, the patterned light shielding film being formed on a surface of the other film.
15. The stacked film of claim 14 , wherein other film covers the transparent substrate, and the film formed between said patterned light shielding film and said semiconductor film covers the patterned light shielding film and the other film.
16. The stacked film of claim 15 , wherein the film formed between said patterned light shielding film and said semiconductor film comprises a lower portion formed on other film and an upper portion formed on the patterned light shielding film, the upper portion having a height which is greater than a height of the lower portion, and
wherein the semiconductor film is formed on the upper portion.
17. The stacked film of claim 1 , wherein the film formed between said patterned light shielding film and said semiconductor film includes a thickness between 150 nm and 300 nm.
18. A thin film transistor comprising:
a base insulating film which is formed on a transparent substrate and includes a patterned light shielding film; and
a stacked film which comprises an active layer of said thin film transistor, and is formed on said base insulating film,
wherein said stacked film includes:
a semiconductor film which is formed on said base insulating film above said patterned light shielding film and includes a taper angle in the range from 40° to 60°; and
a first oxide film which is formed on said semiconductor film,
wherein said base insulating film comprises a film formed between said patterned light shielding film and said semiconductor film which includes a thickness between 100 nm and 500 nm.
19. A thin film transistor (TFT) array substrate for a liquid crystal light valve, comprising:
a transparent substrate; and
a thin film transistor formed on said transparent substrate, comprising:
a base insulating film which is formed on said transparent substrate and includes a patterned light shielding film; and
a stacked film which comprises an active layer of said thin film transistor, and is formed on said base insulating film, said stacked film comprising:
a semiconductor film which is formed on a base insulating film above said patterned light shielding film and includes a taper angle in the range from 40° to 60°; and
a first oxide film which is formed on said semiconductor film,
wherein said base insulating film comprises a film formed between said patterned light shielding film and said semiconductor film which includes a thickness between 100 nm and 500 nm.
20. The TFT array substrate of claim 19 , further comprising:
a gate insulating film formed on said stacked film;
a gate line formed on said gate insulating film;
a first interlayer insulating film formed on said gate line;
a data line formed on said first interlayer insulating film and contacting a source region of said semiconductor film through a contact hole in said first interlayer insulating film, said gate insulating film and said first oxide film;
a second interlayer insulating film formed on said data line and said first interlayer insulating film;
a flattening film formed on said second interlayer insulating film; and
a pixel electrode formed on said flattening film and contacting a drain region of said semiconductor film through a contact hole in said flattening film, said second interlayer insulating film, said first interlayer insulating film, said gate insulating film and said first oxide film.