Electro-optical device, driving circuit, and electronic apparatus for decreasing frame size
View Patent ↗The object of the present invention is to decrease a frame size in a case where data lines are driven by using a demultiplexer. The data lines 114 are divided into groups each having three data lines. TFTs 52 and 54 are provided for each data line 114 , and the TFT 52 between the TFTs has a source electrode commonly connected in each group and a drain electrode connected to the data line 114 . In addition, the TFT 54 has a source electrode connected to the data line 114 and a drain electrode commonly connected in each group. A data signal output circuit 32 that outputs data signals having voltage values in accordance with gray scale levels of sub-pixels corresponding to intersections of a selected scan line and a selected data line in each group to each group. Since the selected data line 114 is connected to an inverting input terminal of an operational amplifier 34 through the TFT 54 , the operational amplifier 34 controls the voltage of the data line 114 to be identical to the voltage of a signal output from the data signal output circuit.
1. A driving circuit of an electro-optical device that has a plurality of scan lines, a plurality of data lines divided into groups each having m (where m is an integer equal to or greater than two) data lines, and pixels, which are provided in correspondence with intersections of the plurality of scan lines and the plurality of data lines, having gray scale levels in accordance with voltage values of the plurality of data lines at a time when the plurality of scan lines are individually selected and drives the plurality of data lines when one of the plurality of scan lines is selected, the driving circuit comprising:
first transistors, which are provided in the plurality of data lines, each having one end commonly connected together in each group and the other terminal connected to the data line;
second transistors, which are provided in the plurality of data lines, each having one end connected to the data line and the other end commonly connected together in each group;
a control circuit that sequentially selects m data lines belonging to each group in a predetermined order at a time when the one of the plurality of scan lines is selected and makes one and the other terminals of the first transistor and the second transistor corresponding to the selected data line be in a mutual conduction state, respectively;
a data signal output circuit that outputs data signals having voltage values in accordance with gray scale levels of pixels corresponding to intersections of the one scan line and the selected data line in each group to each group; and
operational amplifiers, which are provided in correspondence with the each group, each setting a high voltage value to a voltage supplied to the one terminal of the first transistor in a case where the voltage of the one terminal of the second transistor in the conduction state is lower than a voltage of the data signal output from the data signal output circuit and setting a low voltage value to a voltage supplied to the one terminal of the first transistor in a case where the voltage of the one terminal of the second transistor in the conduction state is lower than the voltage of the data signal output from the data signal output circuit, wherein
the data signals output from the data signal output circuit are supplied to the non-inverting input terminals of the operational amplifier circuits,
the output terminals of the operational amplifier circuits are connected to the commonly connected portions of the one terminals of the first transistors,
a resistor and a first switch are provided for each operational amplifier circuit,
the resistors are interposed between the output terminals of the operational amplifier circuits and the inverting input terminals of the operational amplifier circuits, and
the first switches, between the commonly connected portions of the other terminals of the second transistors and the inverting input terminals of the operational amplifier circuits, are turned off during a former period in a period during which one data line in each group is selected and are turned on during a latter period in the period during which one data line in each group is selected.
2. The driving circuit according to claim 1 ,
wherein the data signals output from the data signal output circuit are supplied to non-inverting input terminals of the operational amplifier circuits,
wherein the commonly connected portions of the other terminals of the second transistors are connected to the inverting input terminals of the operational amplifier circuits, and
wherein output terminals of the operational amplifier circuits are connected to the commonly connected portions of the one terminals of the first transistors.
3. The driving circuit according to claim 2 , wherein resistors are interposed between the output terminals of the operational amplifier circuits and the inverting input terminals.
4. The driving circuit according to claim 1 ,
wherein second switches are provided for the operational amplifier circuits, and
wherein the second switches, between the output terminals of the operational amplifier circuits and the commonly connected portions of the other terminals of the second transistors, are turned on during the former period and are turned off during the latter period.
5. The driving circuit according to claim 1 ,
wherein auxiliary switches are additionally included for the operational amplifier circuits, and
wherein the auxiliary switches are turned on during the former period and turned off during the latter period, between the output terminals of the operational amplifier circuits and the inverting input terminals.
6. The driving circuit according to claim 1 ,
wherein the first switch is turned off and on during the period when one data line in each group is selected and the first transistor and the second transistor are turned on and the data signal is supplied to one data line in each group.
7. An electro-optical device comprising:
a plurality of scan lines;
a plurality of data lines divided into groups each having m (where m is an integer equal to or greater than two) data lines;
pixels, which are provided in correspondence with intersections of the plurality of scan lines and the plurality of data lines, having gray scale levels in accordance with voltage values of the plurality of data lines at a time when the plurality of scan lines are individually selected;
a scan line driving circuit that sequentially selects the plurality of scan lines in a predetermined order; and
a data line driving circuit that drives the plurality of data lines when one of the plurality of scan lines is selected,
wherein the data line driving circuit includes:
first transistors, which are provided in the plurality of data lines, each having one end commonly connected together in each group and the other terminal connected to the data line;
second transistors, which are provided in the plurality of data lines, each having one end connected to the data line and the other end commonly connected together in each group;
a control circuit that sequentially selects m data lines belonging to each group in a predetermined order at a time when the one of the plurality of scan lines is selected and makes one and the other terminals of the first transistor and the second transistor corresponding to the selected data line be in a mutual conduction state, respectively;
a data signal output circuit that outputs data signals having voltage values in accordance with gray scale levels of pixels corresponding to intersections of the one scan line and the selected data line in each group; and
operational amplifiers, which are provided in correspondence with the each group, each setting a high voltage value to a voltage supplied to the one terminal of the first transistor in a case where the voltage of the one terminal of the second transistor in the conduction state is lower than a voltage of the data signal output from the data signal output circuit and setting a low voltage value to a voltage supplied to the one terminal of the first transistor in a case where the voltage of the one terminal of the second transistor in the conduction state is lower than the voltage of the data signal output from the data signal output circuit, wherein
the data signals output from the data signal output circuit are supplied to the non-inverting input terminals of the operational amplifier circuits,
the output terminals of the operational amplifier circuits are connected to the commonly connected portions of the one terminals of the first transistors,
a resistor and a first switch are provided for each operational amplifier circuit,
the resistors are interposed between the output terminals of the operational amplifier circuits and the inverting input terminals of the operational amplifier circuits, and
the first switches, between the commonly connected portions of the other terminals of the second transistors and the inverting input terminals of the operational amplifier circuits, are turned off during a former period in a period during which one data line in each group is selected and are turned on during a latter period in the period during which one data line in each group is selected.
8. An electronic apparatus having the electro-optical device according to claim 7 .
9. The electro-optical device according to claim 7 ,
wherein the first switch is turned off and on during the period when one data line in each group is selected and the first transistor and the second transistor are turned on and the data signal is supplied to one data line in each group.