Thin film transistor substrate with bonding layer and method for fabricating the same

1. A thin film transistor substrate, comprising:

a base substrate; and

a gate electrode formed on the base substrate, the gate electrode comprising:

a bonding layer formed on the base substrate, the bonding layer comprising one of aluminum oxide and zirconium dioxide; and

an electrically conductive layer formed on the bonding layer;

wherein the bonding layer comprises a plurality of micro-grooves on a surface thereof adjacent to the conductive layer.

2. The thin film transistor substrate as claimed in claim 1 , wherein the conductive layer comprises copper.

3. The thin film transistor substrate as claimed in claim 1 , wherein the conductive layer comprises an alloy, which is a combination of copper and one of molybdenum, chromium, and tungsten.

4. The thin film transistor substrate as claimed in claim 1 , wherein the gate electrode further comprises a barrier layer formed on the conductive layer.

5. The thin film transistor substrate as claimed in claim 4 , wherein the barrier layer comprises one of titanium nitride, tantalum nitride, and tungsten nitride.

6. The thin film transistor substrate as claimed in claim 4 , wherein the barrier layer has a thickness in the range from 5 to 30 nanometers.

7. The thin film transistor substrate as claimed in claim 1 , wherein the bonding layer has a thickness in the range from 5 to 30 nanometers.

8. The thin film transistor substrate as claimed in claim 1 , wherein the conductive layer has a thickness in the range from 200 to 400 nanometers.

9. The thin film transistor substrate as claimed in claim 1 , wherein the bonding layer is an aluminum oxide layer.

10. The thin film transistor substrate as claimed in claim 9 , wherein an adhesion strength between the bonding layer and the base substrate is about 48 joules per square meter.

11. The thin film transistor substrate as claimed in claim 1 , wherein the bonding layer is a zirconium dioxide layer.

12. The thin film transistor substrate as claimed in claim 11 , wherein an adhesion strength between the bonding layer and the base substrate is in the range from 53 joules per square meter to 79 joules per square meter.

13. The thin film transistor substrate as claimed in claim 1 , wherein the bonding layer covers substantially the whole base substrate.

14. A method for fabricating a thin film transistor substrate, the method comprising:

providing a base substrate;

forming a bonding layer on the base substrate, the bonding layer comprising one of aluminum oxide and zirconium dioxide;

plasma-treating a surface of the bonding layer to form a plurality of micro-grooves thereon;

forming a conductive layer and a photo-resistor layer on the bonding layer;

applying an exposing process on the photo-resistor layer through a mask and developing the photo-resistor layer;

etching the conductive layer; and

ashing the photo-resistor layer so as to obtain a gate electrode on the base substrate.

15. The method as claimed in the claim 14 , wherein the surface of the bonding layer is plasma-treated with ammonia.

16. The method as claimed in the claim 15 , wherein during the plasma-treatment with ammonia, a flow rate of ammonia is below 50 standard cubic centimeters per minute.

17. The method as claimed in the claim 14 , wherein when the bonding layer is formed on the base substrate, oxygen is provided.

18. The method as claimed in the claim 17 , wherein a flow rate of the oxygen is in the range from 5 to 15 standard cubic centimeters per minute.

19. A thin film transistor substrate, comprising:

a base substrate; and

a gate electrode formed on the base substrate, the gate electrode comprising:

a bonding layer formed on the base substrate, the bonding layer comprising one of aluminum oxide and zirconium dioxide; and

an electrically conductive layer formed on the bonding layer;

wherein the conductive layer comprises at least one item selected from the group consisting of copper and copper alloy.

20. The thin film transistor substrate as claimed in claim 19 , wherein the conductive layer comprises copper alloy, and the copper alloy is a combination of copper and one of molybdenum, chromium, and tungsten.