IP Library Granted Patent US 8,028,923
Granted Patent B2
US 8,028,923 · App. 11/985,534 · Granted Oct 4, 2011

Electronic inlay structure and method of manufacture thereof

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Quick Facts
Patent No.
US 8,028,923
App. No.
11/985,534
Granted
Oct 4, 2011
Kind
B2
Abstract

An electronic inlay structure including first and second sheets of an inlay substrate arranged in generally side to side, spaced parallel arrangement, having a gap therebetween, a flexible web material arranged to overlie the gap and edges of the first and second sheets of the inlay structure adjacent the gap, third and fourth sheets arranged in registration with the first and second sheets respectively, over the first and second sheets of the inlay substrate and partially over the flexible web material and bonded thereto, electronic circuitry associated with at least one of the first, second, third and fourth sheets and lamination enclosing the first, second, third and fourth sheets, the electronic circuitry and the web material together to create the inlay structure.

Claims (22)

1. An electronic inlay structure comprising:

first and second sheets of an inlay substrate arranged in generally side to side, spaced parallel arrangement, having a gap therebetween;

a flexible web material arranged to overlie said gap and edges of said first and second sheets of said inlay structure adjacent said gap;

third and fourth sheets arranged in registration with said first and second sheets respectively, over said first and second sheets of said inlay substrate and partially over said flexible web material and bonded thereto;

electronic circuitry associated with at least one of said first, second, third and fourth sheets; and

lamination enclosing said first, second, third and fourth sheets, said electronic circuitry and said web material together to create said inlay structure.

2. An electronic inlay structure according to claim 1 and wherein said inlay substrate material is selected from the group consisting of coated paper, TESLIN®, PVC, polycarbonate, PET-G, PETF and ABS.

3. An electronic inlay structure according to claim 1 and wherein at least part of said electronic circuitry is located on any of said first, second, third and fourth sheets of said inlay substrate.

4. An electronic inlay structure according to claim 3 and wherein said electronic circuitry comprises at least one wireless communication antenna which is at least partially embedded in at least one of said first, second, third and fourth sheets.

5. An electronic inlay structure according to claim 1 and wherein said electronic circuitry comprises at least one wireless communication antenna which is at least partially embedded in at least one of said first, second, third and fourth sheets.

6. An electronic inlay structure according to claim 1 and wherein said electronic circuitry comprises a smart card chip providing identification functionality.

7. The electronic inlay structure of claim 1 , wherein the first and second sheets are generally arranged coplanar and separated by the gap formed between the parallel adjacent edges thereof.

8. The electronic inlay structure of claim 1 , wherein the third and fourth sheets are generally arranged coplanar over the first and second sheets.

9. A method of manufacture of an electronic inlay structure, the method comprising:

arranging first and second sheets of an inlay substrate in generally side to side, spaced parallel arrangement, having a gap therebetween;

arranging a flexible web material to overlie said gap and edges of said first and second sheets of said inlay structure adjacent said gap;

arranging third and fourth sheets of an inlay substrate in registration with said first and second sheets respectively, over said first and second sheets of said inlay substrate and partially over said flexible web material;

bonding said first and third sheets together at locations where they overlie said flexible web material;

bonding said second and fourth sheets together at locations where they overlie said flexible web material;

associating electronic identification circuitry with at least one of said first, second, third and forth sheets; and

laminating said first, second, third and fourth sheets, said electronic circuitry and said web material together to create said inlay structure.

10. A method of manufacture according to claim 9 and wherein said inlay substrate material is selected from the group consisting of coated paper, TESLIN®, PVC, polycarbonate, PET-G, PETE and ABS.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 30, 2019
From: SMARTRAC IP B.V.
To: LINXENS HOLDING S.A.S.
Reel/Frame 049031/0849 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 17, 2010
From: ON TRACK INNOVATIONS LTD.
To: SMARTRAC IP B.V.
Reel/Frame 025003/0501 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 5, 2010
From: SHAFRAN, GUY; BASHAN, ODED
To: ON TRACK INNOVATIONS LTD
Reel/Frame 024340/0113 →