Insulated gate bipolar transistor fault protection system
View Patent ↗An Insulated Gate Bipolar Transistor (IGBT) fault protection system is provided. The fault protection system includes a GVPA, a gate voltage clamper, and a soft-off unit. The GVPA analyzes a gate voltage pattern of an IGBT to determine whether or not a fault has occurred. The gate voltage clamper prevents an increase in a gate voltage of the IGBT according to an output signal that the GVPA outputs when a fault has occurred. The soft-off unit softly turns off the IGBT according to an output signal that the GVPA outputs when a fault has occurred.
1. An Insulated Gate Bipolar Transistor (IGBT) fault protection system comprising:
a Gate Voltage Pattern Analyzer (GVPA) configured to analyze a gate voltage pattern of an IGBT to determine whether or not a fault has occurred, wherein the GVPA comprises:
a first comparator configured to determine whether or not a short-circuit fault of the IGBT has occurred; and
a second comparator configured to determine whether or not a fault under load of the IGBT has occurred;
a gate voltage clamper configured to prevent a substantial increase in a gate voltage of the IGBT according to an output signal that the GVPA outputs when a fault has occurred; and
a soft-off unit configured to softly turn off the IGBT according to a GVPA output signal that the GVPA outputs when a fault has occurred;
wherein the fault protection system is implemented in an integrated circuit;
a buffer and a resistor, coupled between a gate driver and a gate of the IGBT;
a first terminal between the resistor and the gate, coupled to a non-inverting terminal of the first comparator; and
a second terminal between the buffer and the resistor, coupled via a first and a second resistor to an inverting terminal of the first comparator; wherein
the second terminal is coupled to an inverting terminal of the second comparator; and
the first terminal is coupled via a third and a fourth resistor to a non-inverting terminal of the second comparator.
2. The IGBT fault protection system according to claim 1 , further comprising:
a time delayer configured to transfer the GVPA output signal with a predetermined time delay.
3. The IGBT fault protection system according to claim 1 , further comprising:
a buffer, configured to buffer a gate input signal to the IGBT; and
a buffer blocker for deactivating the buffer according to the GVPA output signal.
4. The IGBT fault protection system according to claim 1 , wherein the GVPA comprises:
an SR latch for outputting a high signal when at least one of the first and the second comparators determines that a fault has occurred.
5. The IGBT fault protection system according to claim 1 , wherein the first and second comparators include an op amp.
6. The IGBT fault protection system according to claim 1 , further comprising:
an OR gate, configured to receive outputs of the first and second comparators; and
having an output coupled to an S input terminal of the SR latch.
7. The IGBT fault protection system according to claim 4 , further comprising:
an inverter configured to receive and invert the gate signal from the second terminal and to input the inverted gate signal to an R input terminal of the SR latch.
8. The IGBT fault protection system according to claim 1 , wherein the gate voltage clamper comprises:
a Zener diode having a cathode connected to a gate of the IGBT; and
a transistor having a collector connected to an anode of the Zener diode, an emitter grounded, and a gate connected to an output terminal of the GVPA.
9. The IGBT fault protection system according to claim 1 , wherein the soft-off unit includes:
a resistor connected to a gate of the IGBT; and
a transistor having a collector connected to the resistor, an emitter grounded, and a gate connected to an output terminal of the GVPA.