ARRANGEMENT FOR AND METHOD OF PROTECTING A DATA PROCESSING DEVICE AGAINST AN ATTACK OR ANALYSIS
In order to further develop an arrangement for as well as a method of protecting at least one data processing device, in particular at least one embedded system, for example at least one chip card or smart card, against at least one attack, in particular against at least one side-channel attack, for example against at least one current trace analysis, the data processing device, in particular at least one integrated circuit of the data processing device, carrying out calculations, in particular cryptographic operations wherein an attack, for example an E[lectro]M[agnetic] radiation attack, or an analysis, for example a D[ifferential]P[ower]A[nalysis], such attack or such analysis in particular targeted on finding out a private key, is to be securely averted, it is proposed to blind all intermediate results of the calculations by at least one random variable.
1 . An arrangement ( 100 ) for protecting at least one data processing device, in particular at least one embedded system, for example at least one chip card or smart card, against at least one attack, in particular against at least one side-channel attack, for example against at least one current trace analysis, the data processing device, in particular at least one integrated circuit of the data processing device, carrying out calculations, in particular cryptographic operations, characterized by blinding all intermediate results of the calculations by at least one random variable.
2 . The arrangement according to claim 1 , characterized in that the random variable
is kept constant during a complete calculation, and
is changed when a new calculation is started.
3 . The arrangement according to claim 1 , characterized in that the calculations are based on the R[ivest-]S[hamir-]A[dleman] algorithm and/or on the E[lliptic]C[urve]C[ryptography] algorithm.
4 . The arrangement according to claim 1 , characterized by using the Montgomery reduction or another type of reduction.
5 . The arrangement according to claim 1 , characterized by
at least one memory unit ( 20 ) for storing the, in particular all, operands and the, in particular all, results of the calculations;
at least one multiplier unit ( 10 ) being connected ( 12 ) to the memory unit ( 20 ),
at least one inverter unit ( 30 ) being connected ( 32 ) to the memory unit ( 20 ),
at least one state machine ( 40 )
for controlling the multiplier unit ( 10 ) for performing the required type of calculation,
for controlling the inverter unit ( 30 ) for the inversion operation,
for reading the input operands from the memory unit ( 20 ), and/or
for writing the, in particular all, results of the calculations to the memory unit ( 20 ).
6 . A data processing device, in particular an embedded system, for example a chip card or a smart card, comprising at least one integrated circuit carrying out calculations, in particular cryptographic operations, characterized by at least one arrangement ( 100 ) according to claim 1 .
7 . A method of protecting at least one data processing device, in particular at least one embedded system, for example at least one chip card or smart card, against at least one attack, in particular against at least one side-channel attack, for example against at least one current trace analysis, the data processing device, in particular at least one integrated circuit of the data processing device, carrying out calculations, in particular cryptographic operations, characterized by blinding all intermediate results of the calculations by at least one random variable.
8 . The method according to claim 7 , characterized in that the random variable
is kept constant during a complete calculation, and
is changed when a new calculation is started.
9 . The method according to claim 7 , characterized in that the calculations are based on the R[ivest-]S[hamir-]A[dleman] algorithm and/or on the E[lliptic]C[urve]C[ryptography] algorithm.
10 . The method according to claim 7 , characterized by using the Montgomery reduction or another type of reduction.
11 . Use of at least one arrangement ( 100 ) for protecting at least one data processing device, in particular at least one embedded system, for example at least one chip card or smart card, against at least one attack, in particular against at least one side-channel attack, for example against at least one current trace analysis, the data processing device, in particular at least one integrated circuit of the data processing device, carrying out calculations, in particular cryptographic operations, characterized by blinding all intermediate results of the calculations by at least one random variable and/or of the method of protecting at least one data processing device, in particular at least one embedded system, for example at least one chip card or smart card, against at least one attack, in particular against at least one side-channel attack, for example against at least one current trace analysis, the data processing device, in particular at least one integrated circuit of the data processing device, carrying out calculations, in particular cryptographic operations, characterized by blinding all intermediate results of the calculations by at least one random variable in at least one data processing device according to claim 6 to be protected against D[ifferential]P[ower]A[nalysis].