IP Library Granted Patent US 8,305,309
Granted Patent B2
US 8,305,309 · App. 12/000,128 · Granted Nov 6, 2012

Display device with power source supply scan circuits and driving method thereof

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Quick Facts
Patent No.
US 8,305,309
App. No.
12/000,128
Granted
Nov 6, 2012
Kind
B2
Abstract

A display device includes a pixel array unit having pixels disposed in a matrix shape, each pixel including an electro-optical element, a write transistor for sampling and writing an input signal voltage, a holding capacitor for holding a signal voltage written by the write transistor, and a driver transistor for driving the electro-optical element in response to the signal voltage held in the holding capacitor. The display device further includes a scan circuit for selectively scanning each pixel in the pixel array unit at a row unit basis and a plurality of power source supply scan circuits for selectively supplying a first potential and a second potential lower than the first potential to a power supply line wired per each pixel row of the pixel array unit to supply current to the driver transistors, synchronously with scanning by the scan circuit.

Claims (21)

1. A display device comprising:

a pixel array unit having pixels disposed in a matrix shape, each pixel including an electro-optical element, a write transistor for sampling and writing an input signal voltage provided from a signal line placed at a signal voltage or a reference potential, a holding capacitor for holding the signal voltage written by the write transistor, and a driver transistor for driving the electro-optical element in response to the signal voltage held in the holding capacitor;

a scan circuit for selectively scanning each pixel in the pixel array unit at a row unit basis; and

a plurality of power source supply scan circuits for selectively supplying a first potential and a second potential lower than the first potential to a power supply line to supply current to the driver transistors, synchronously with line sequential scanning by the scan circuit,

wherein, at a beginning of line sequential scanning, the second potential is lower than the reference potential at the signal line; and

wherein the plurality of power source supply scan circuits are disposed on both sides of the pixel array unit by sandwiching the pixel array unit, and one of the plurality of power source supply scan circuits is disposed between the pixel array unit and the scan circuit.

2. The display device according to claim 1 , wherein the driver transistor is initialized for a threshold voltage correction operation by setting a gate of the driver transistor as the reference potential and setting a source of the driver transistor as the second potential.

3. A driving method for use in a display device comprising a scan circuit, a plurality of power source supply scan circuits, and a pixel array unit having pixels disposed in a matrix shape, a write transistor for sampling and writing an input signal voltage provided from a signal line placed at a signal voltage or a reference potential, a holding capacitor for holding the signal voltage written by the write transistor, and a driver transistor for driving the electro-optical element in response to the signal voltage held in the holding capacitor, the method comprising:

selectively scanning each pixel in the pixel array unit on a row unit basis; and

selectively supplying a first potential and a second potential lower than the first potential as power source potential to a power supply line to supply current to the driver transistors, synchronously with line sequential scanning by the scan circuit

wherein, at a beginning of line sequential scanning, the second potential is lower than the reference potential at the signal line; and

wherein the plurality of power source supply scan circuits are disposed on both sides of the pixel array unit by sandwiching the pixel array unit, and one of the plurality of power source supply scan circuits is disposed between the pixel array unit and the scan circuit.

4. The driving method according to claim 3 , wherein the driver transistor is initialized for a threshold voltage correction operation by setting a gate of the driver transistor as the reference potential and setting a source of the driver transistor as the second potential.

5. An electronic apparatus having a display device

the display device comprising:

a pixel array unit having pixels disposed in a matrix shape, each pixel including an electro-optical element, a write transistor for sampling and writing an input signal voltage provided from a signal line placed at a signal voltage or a reference potential, a holding capacitor for holding the signal voltage written by the write transistor, and a driver transistor for driving the electro-optical element in response to the signal voltage held in the holding capacitor;

a scan circuit for selectively scanning each pixel of the pixel array unit on a row unit basis; and

a plurality of power source supply scan circuits for selectively supplying a first potential and a second potential lower than the first potential to a power supply line to supply current to the driver transistors, synchronously with line sequential scanning by the scan circuit

wherein, at a beginning of line sequential scanning, the second potential is lower than the reference potential at the signal line; and

wherein the plurality of power source supply scan circuits are disposed on both sides of the pixel array unit by sandwiching the pixel array unit, and one of the plurality of power source supply scan circuits is disposed between the pixel array unit and the scan circuit.

6. The electronic apparatus according to claim 5 , wherein the driver transistor is initialized for a threshold voltage correction operation by setting a gate of the driver transistor as the reference potential and setting a source of the driver transistor as the second potential.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 18, 2025
From: JDI DESIGN AND DEVELOPMENT G.K.
To: MAGNOLIA BLUE CORPORATION
Reel/Frame 072039/0656 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 31, 2024
From: JOLED, INC.
To: JDI DESIGN AND DEVELOPMENT G.K.
Reel/Frame 066382/0619 →
CORRECTION BY AFFIDAVIT FILED AGAINST REEL/FRAME 063396/0671 Recorded Jun 12, 2023
From: JOLED, INC.
To: JOLED, INC.
Reel/Frame 064067/0723 →
SECURITY INTEREST Recorded Apr 20, 2023
From: JOLED, INC.
To: INCJ, LTD.
Reel/Frame 063396/0671 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 15, 2015
From: SONY CORPORATION
To: JOLED INC.
Reel/Frame 036106/0355 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 10, 2007
From: TOMIDA, MASATSUGU; LIDA, YUKIHITO; UCHINO, KATSUHIDE
To: SONY CORPORATION
Reel/Frame 020271/0794 →