IP Library Granted Patent US 7,990,742
Granted Patent B2
US 7,990,742 · App. 12/000,546 · Granted Aug 2, 2011

Charge pump circuit and methods of operation thereof

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Quick Facts
Patent No.
US 7,990,742
App. No.
12/000,546
Granted
Aug 2, 2011
Kind
B2
Abstract

A charge pump circuit, and associated method and apparatuses, for providing a split-rail voltage supply, the circuit having a network of switches that is operable in a number of different states and a controller for operating the switches in a sequence of said states so as to generate positive and negative output voltages together spanning a voltage approximately equal to the input voltage and centered on the voltage at the common terminal.

Claims (58)

1. A charge pump circuit comprising:

an input terminal;

first and second output terminals;

a common terminal;

a first pair of flying capacitor terminals comprising first and second flying capacitor terminals;

a second pair of flying capacitor terminals comprising third and fourth flying capacitor terminals; and

a switch network, said switch network comprising:

a first switch for coupling the input terminal to the first flying capacitor terminal,

a second switch for coupling the first flying capacitor terminal to the first output terminal,

a third switch for coupling the first flying capacitor terminal to said third flying capacitor terminal, wherein if the third switch is closed and the other switches in the switch network are open, the first flying capacitor terminal is coupled to only the third flying capacitor terminal,

a fourth switch for coupling the second flying capacitor terminal to said common terminal,

a fifth switch for coupling the second flying capacitor terminal to said third flying capacitor terminal,

a sixth switch for coupling the second flying capacitor terminal to the fourth flying capacitor terminal,

a seventh switch for coupling the fourth flying capacitor terminal to the common terminal, and

an eighth switch for coupling the fourth flying capacitor terminal to the second output terminal.

2. The circuit of claim 1 , further comprising a controller for operating said switch network in a sequence of states.

3. The circuit of claim 2 , further comprising a control signal input for receiving a control signal.

4. The circuit of claim 3 , wherein said controller operates said switch network in said sequence according to said control signal to generate either a first positive output voltage and a first negative output voltage that are each substantially equal in magnitude to the magnitude of an input voltage on said input terminal or a second positive output voltage and a second negative output voltage that are each substantially equal in magnitude to half the magnitude of said input voltage.

5. The circuit of claim 4 , wherein, during one of said sequence of states, said switch network interconnects said first and second pairs of flying capacitor terminals in parallel while said first and second pairs of flying capacitor terminals are disconnected from said input terminal and said first and second output terminals.

6. The circuit of claim 1 , wherein if the sixth switch is closed and the other switches in the switch network are open, the second flying capacitor terminal is coupled to only the fourth flying capacitor terminal.

7. A charge pump circuit comprising:

an input terminal;

first and second output terminals;

a common terminal;

a first pair of flying capacitor terminals comprising first and second flying capacitor terminals;

a second pair of flying capacitor terminals comprising third and fourth flying capacitor terminals; and

a switch network, the switch network comprising;

a first switch for coupling the input terminal to the first flying capacitor terminal,

a second switch for coupling the first flying capacitor terminal to the first output terminal,

a third switch for coupling the first flying capacitor terminal to the third flying capacitor terminal,

a fourth switch for coupling the second flying capacitor terminal to the common terminal,

a fifth switch for coupling the second flying capacitor terminal to the third flying capacitor terminal,

a sixth switch for coupling the second flying capacitor terminal to the fourth flying capacitor terminal, wherein the first and second pairs of flying capacitor terminals are in parallel and disconnected from the input terminal and the first and second output terminals when the sixth and third switches are closed,

a seventh switch for coupling the fourth flying capacitor terminal to the common terminal, and

an eighth switch for coupling the fourth flying capacitor terminal to the second output terminal.

8. The circuit of claim 7 , further comprising a controller for operating the switch network in a sequence of states.

9. The circuit of claim 8 , further comprising a control signal input for receiving a control signal.

10. The circuit of claim 9 , wherein the controller operates the switch network in the sequence according to the control signal to generate either a first positive output voltage and a first negative output voltage that are each substantially equal in magnitude to the magnitude of an input voltage on the input terminal or a second positive output voltage and a second negative output voltage that are each substantially equal in magnitude to half the magnitude of the input voltage.

11. A charge pump circuit comprising:

an input terminal;

first and second output terminals;

a common terminal;

a first pair of flying capacitor terminals comprising first and second flying capacitor terminals;

a second pair of flying capacitor terminals comprising third and fourth flying capacitor terminals; and

a switch network, the switch network comprising;

a first switch for coupling the input terminal to the first flying capacitor terminal,

a second switch for coupling the first flying capacitor terminal to the first output terminal,

a third switch for coupling the first flying capacitor terminal to the third flying capacitor terminal,

a fourth switch for coupling the second flying capacitor terminal to the common terminal,

a fifth switch for coupling the second flying capacitor terminal to the third flying capacitor terminal,

a sixth switch for coupling the second flying capacitor terminal to the fourth flying capacitor terminal,

a seventh switch for coupling the fourth flying capacitor terminal to the common terminal, and

an eighth switch for coupling the fourth flying capacitor terminal to the second output terminal, wherein each switch of the switch network, when closed, couples its respective terminals irrespective of whether other of the switches are closed.

12. The circuit of claim 11 , further comprising a controller for operating the switch network in a sequence of states.

13. The circuit of claim 12 , further comprising a control signal input for receiving a control signal.

14. The circuit of claim 13 , wherein the controller operates the switch network in the sequence according to the control signal to generate either a first positive output voltage and a first negative output voltage that are each substantially equal in magnitude to the magnitude of an input voltage on the input terminal or a second positive output voltage and a second negative output voltage that are each substantially equal in magnitude to half the magnitude of said input voltage.

15. The circuit of claim 14 , wherein, during one of said sequence of states, the switch network interconnects the first and second pairs of flying capacitor terminals in parallel while the first and second pairs of flying capacitor terminals are disconnected from the input terminal and the first and second output terminals.

16. The circuit of claim 11 , wherein the sixth switch is able to couple the second flying capacitor terminal to the fourth flying capacitor terminal independent of the eighth switch.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 15, 2015
From: CIRRUS LOGIC INTERNATIONAL SEMICONDUCTOR LTD.
To: CIRRUS LOGIC INC.
Reel/Frame 035909/0190 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 2, 2015
From: CIRRUS LOGIC INTERNATIONAL (UK) LTD.
To: CIRRUS LOGIC INTERNATIONAL SEMICONDUCTOR LTD.
Reel/Frame 035806/0389 →
CHANGE OF NAME Recorded Apr 1, 2015
From: WOLFSON MICROELECTRONICS LTD
To: CIRRUS LOGIC INTERNATIONAL (UK) LTD.
Reel/Frame 035353/0413 →
CHANGE OF NAME Recorded Apr 1, 2015
From: WOLFSON MICROELECTRONICS PLC
To: WOLFSON MICROELECTRONICS LTD
Reel/Frame 035356/0096 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 13, 2007
From: LESSO, JOHN P.
To: WOLFSON MICROELECTRONICS PLC
Reel/Frame 020294/0872 →