Method of fabricating semiconductor memory device and semiconductor memory device

1 . A method of fabricating a semiconductor memory device having a gate electrode and a charge storage layer, the method comprising:

forming a device isolation region in a recessed portion of a semiconductor substrate having an irregularly-shaped portion;

forming a gate electrode wiring trench in the device isolation region in a direction orthogonal to a longitudinal direction of a projecting portion of the semiconductor substrate having the irregularly-shaped portion;

forming a layer formed of a gate electrode material so as to fill in the gate electrode wiring trench;

forming a gate electrode by patterning the layer formed of the gate electrode material;

forming an active region by etching the device isolation region;

forming a charge storage layer on at least one side surface of the gate electrode, the surface being adjacent to the projecting portion of the semiconductor substrate having the irregularly-shaped portion; and

forming a side wall on at least a part of the charge storage layer.

2 . The method of fabricating a semiconductor memory device according to claim 1 , wherein the forming of the charge storage layer is performed after the forming of the gate electrode.

3 . A semiconductor memory device comprising:

a semiconductor substrate having an irregularly-shaped portion;

a gate electrode that covers at least two side surfaces of an active region formed of a projecting portion of the semiconductor substrate having the irregularly-shaped portion;

a charge storage layer that covers at least one side surface of the gate electrode, the surface being adjacent to the projecting portion of the semiconductor substrate having the irregularly-shaped portion;

a side wall that is formed so as to cover at least a part of the charge storage layer;

a channel region that is formed in the active region in an area covered by the gate electrode in the active region;

a source region and a drain region that are formed in the active region so as to sandwich the channel region; and

an extension region that is formed in the active region at least one of an area between the channel region and the source region and an area between the channel region and the drain region.

4 . The semiconductor memory device according to claim 3 , wherein a device isolation region is formed in a recessed portion of the irregularly-shaped portion.

5 . The semiconductor memory device according to claim 4 , wherein the gate electrode is made of a gate electrode material filled in a gate electrode wiring trench formed in the device isolation region.