IP Library Granted Patent US 7,901,969
Granted Patent B2
US 7,901,969 · App. 12/004,598 · Granted Mar 8, 2011

Micromirror manufacturing method

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Quick Facts
Patent No.
US 7,901,969
App. No.
12/004,598
Granted
Mar 8, 2011
Kind
B2
Abstract

A micro-mirror manufacturing method for dividing a plurality of micro-mirror devices each having at least one mirror, formed on a semiconductor wafer into individual micro-mirror devices can be provided. The manufacturing method comprises a step of depositing an inorganic protection layer on the mirror before separating the micro-mirror devices from the wafer and a step of removing the inorganic protection layer after separating the micro-mirror devices from the wafer.

Claims (41)

1. A method for manufacturing a plurality of micro-electrical-mechanical-systems(MEMS) devices on a semiconductor wafer wherein each having at least one movable element comprising:

depositing and patterning a first sacrificial layer into a plurality of support structures followed by forming a depositing and patterning a plurality of hinges along a vertical and horizontal sidewalls of said support structures;

depositing a second sacrificial layer covering over the hinges and said support structures followed by etching back said second sacrificial layer back to a top surface of said hinges;

depositing and patterning a reflective surface on top of the second sacrificial layer contacting the top surface of said hinge thus forming a plurality of movable elements; and

depositing an inorganic protection layer on top of the reflective surface and the second sacrificial layer covering over the movable elements followed by dicing the semiconductor wafer for separating the semiconductor wafer into the plurality of MEMS devices from the wafer; and

removing the inorganic protection layer and etching off the first and second sacrificial layers after dicing and separating the semiconductor wafer into the MEMS devices.

2. The micro-electrical-mechanical-systems(MEMS) manufacturing method according to claim 1 , wherein:

the step of depositing the inorganic protection layer is a step of depositing a silicon compound as the inorganic protection layer.

3. The micro-electrical-mechanical-systems(MEMS) manufacturing method according to claim 1 , wherein:

the step of depositing the inorganic protection layer is a step of depositing a silicon dioxide (SiO 2 ) as the inorganic protection layer.

4. The micro-electrical-mechanical-systems(MEMS) manufacturing method according to claim 1 , wherein:

the step of depositing the inorganic protection layer is a step of depositing a silicon carbide (SiC) as the inorganic protection layer.

5. The micro-electrical-mechanical-systems(MEMS) manufacturing method according to claim 1 , wherein:

the step of removing the inorganic protection layer is a step of dry etching to remove the inorganic protection layer.

6. The micro-electrical-mechanical-systems(MEMS) manufacturing method according to claim 1 , wherein:

the step of depositing and patterning the first sacrificial layer is a step of depositing and patterning an inorganic layer into said plurality of support structures for providing the vertical sidewall to extend above the semiconductor wafer as the hinges to support the movable elements.

7. The micro-electrical-mechanical-systems(MEMS) manufacturing method according to claim 1 , wherein:

the step of depositing the inorganic protection layer is a step of depositing the same material as the first sacrificial layer.

8. The method according to claim 1 , further comprising:

applying an anti-stiction process to the MEMS devices to prevent the moveable elements from sticting to a contacting surface.

9. The method according to claim 1 , further comprising:

forming at least one auxiliary member for each of said MEMS devices as an alignment reference before dicing and separating the semiconductor wafer into the MEMS devices.

10. The method according to claim 1 , further comprising:

forming an opening in a back surface of the semiconductor wafer for each of the MEMS device as a relative position reference for packaging the MEMS device before dicing and separating the semiconductor wafer into the MEMS devices.

11. The method according to claim 1 , further comprising:

packaging each of said MEMS devices into a is micro-mirror device.

12. A method for manufacturing a plurality of micro-electrical-mechanical-systems(MEMS) devices on a semiconductor wafer wherein each having at least one movable element comprising:

depositing a first inorganic sacrificial layer on the substrate and patterning the first inorganic sacrificial layer into a plurality of support structures followed by depositing a silicon layer and pattering the silicon layer a plurality of hinges along a vertical and horizontal sidewalls of said support structures by patterning each of said hinges to have a horizontal portion attached to a top surface of the semiconductor wafer and a horizontal portion as a platform for supporting a reflective surface thereon; and

depositing a second inorganic sacrificial layer on the hinges and said first inorganic sacrificial layer.

13. The method according to claim 12 , wherein:

the step of depositing the second sacrificial layer is a step of depositing the second sacrificial layer with the same material as a said first sacrificial layer.

14. The method according to claim 12 , wherein:

the step of depositing the first sacrificial layer is a step of depositing a silicon dioxide (SiO 2 ) as the first sacrificial layer.

15. The method according to claim 12 , further comprising:

removing an inorganic protection layer on top of the second sacrificial layer and etching off the first and second sacrificial layers after dicing and separating the semiconductor wafer into the MEMS devices.

16. The method according to claim 12 , further comprising:

packaging each of said MEMS devices into a micro-mirror device.

17. The method according to claim 12 , further comprising

simultaneously removing an inorganic protection layer on top of the second sacrificial layer by etching off the inorganic protection layer, the first and second sacrificial layers after dicing and separating the semiconductor wafer into the MEMS devices.

18. The method according to claim 12 , further comprising:

performing an inspection on said movable elements before dicing and separating the semiconductor substrate into the MEMS devices by inspecting through the first and second sacrificial layer formed as transparent sacrificial layers.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 18, 2018
From: SILICON QUEST KABUSHIKI-KAISHA(JP); OLYMPUS CORPORATION (JP)
To: IGNITE, INC
Reel/Frame 047204/0909 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 21, 2008
From: ICHIKAWA, HIROTOSHI; ISHII, FUSAO
To: SILICON QUEST KABUSHIKI-KAISHA; OLYMPUS CORPORATION
Reel/Frame 021263/0525 →