IP Library Granted Patent US 7,674,668
Granted Patent B2
US 7,674,668 · App. 12/005,444 · Granted Mar 9, 2010

Method of manufacturing a semiconductor device

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Quick Facts
Patent No.
US 7,674,668
App. No.
12/005,444
Granted
Mar 9, 2010
Kind
B2
Abstract

After a gate electrode is formed on a main surface of a semiconductor substrate, low concentration layers are formed on the main surface of the semiconductor substrate by implanting impurities therein, with using the gate electrode as a mask. Thereafter, first sidewalls and second sidewalls are formed on the both side surfaces of the gate electrode. Subsequently, nitrogen or the like is ion-implanted into the semiconductor substrate, with using the first sidewalls, the second sidewalls and the gate electrode as a mask, thereby forming a crystallization-control region (CCR) on the main surface of the semiconductor substrate. Then, after the second sidewalls are removed, high concentration layers for a source and a drain are formed on the main surface of the semiconductor substrate.

Claims (30)

1. A method of manufacturing a semiconductor device, comprising the steps of:

forming a gate insulator film on a (100) plane of a semiconductor substrate;

forming a gate electrode on the gate insulator film;

forming a first gate film on a side of the gate electrode;

forming a second gate film on the first gate film;

implanting one of nitrogen, oxygen, carbon or argon as a first impurity into the semiconductor substrate, using the second gate film as a mask;

removing the second gate film;

implanting a second impurity into the semiconductor substrate, using the first gate film as a mask, wherein the implantation depth of the second impurity is greater than the implantation depth of the first impurity; and

crystallizing the semiconductor substrate implanted with the first impurity or the second impurity.

2. The method of manufacturing a semiconductor device according to claim 1 ,

wherein the second impurity is one of boron, arsenic, or phosphorous.

3. The method of manufacturing a semiconductor device according to claim 1 ,

wherein the semiconductor substrate includes an SiGe layer.

4. The method of manufacturing a semiconductor device according to claim 1 ,

wherein the region in which the second impurity is implanted is to be a source or a drain, and

a direction from the source to the drain is parallel to a <110> direction.

5. A method of manufacturing a semiconductor device, comprising the steps of:

forming a gate insulator film on a (100) plane of a semiconductor substrate;

forming a gate electrode on the gate insulator film;

forming a first gate film on a side of the gate electrode;

implanting one of nitrogen, oxygen, carbon or argon as a first impurity into the semiconductor substrate, using the first gate film as a mask;

implanting a second impurity into a larger region than the region in which the first impurity is implanted in the semiconductor substrate; and

crystallizing the semiconductor substrate implanted with the first impurity or the second impurity.

6. The method of manufacturing a semiconductor device according to claim 5 ,

wherein the second impurity is one of boron, arsenic, or phosphorous.

7. The method of manufacturing a semiconductor device according to claim 5 ,

wherein the semiconductor substrate includes an SiGe layer.

8. The method of manufacturing a semiconductor device according to claim 5 ,

wherein the region in which the second impurity is implanted is to be a source or a drain, and

a direction from the source to the drain is parallel to a <110> direction.

Assignments (3)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
CHANGE OF NAME Recorded Aug 27, 2010
From: RENESAS TECHNOLOGY CORP.
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 024900/0594 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 21, 2008
From: ISHITSUKA, NORIO; HATTORI, NOBUYOSHI; IWASAKI, TOMIO
To: C/O RENESAS TECHNOLOGY CORP.
Reel/Frame 020831/0068 →