IP Library Granted Patent US 7,939,874
Granted Patent B2
US 7,939,874 · App. 12/012,716 · Granted May 10, 2011

Semiconductor device

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Quick Facts
Patent No.
US 7,939,874
App. No.
12/012,716
Granted
May 10, 2011
Kind
B2
Abstract

A semiconductor device has semiconductor elements formed on a silicon substrate. A first one of the semiconductor elements has a region formed with a surface orientation of <100>. A second one of the semiconductor elements has a region formed with a surface orientation of <110>or <111>. A third one of the semiconductor elements has a region formed with a surface orientation different from the respective surface orientations of the regions of the first and second semiconductor elements.

Claims (15)

1. A semiconductor device comprising: a plurality of semiconductor elements formed on a silicon substrate, a first one of the semiconductor elements having a region formed with a surface orientation of <100>, a second one of the semiconductor elements having a region formed with a surface orientation of <110>or <111>, and a third one of the semiconductor elements having a region formed with a surface orientation different from the respective surface orientations of the regions of the first and second semiconductor elements.

2. A semiconductor device according to claim 1 ; further comprising a silicon oxide film formed on the silicon substrate; and wherein at least a part of a boundary surface between the silicon substrate and the silicon oxide film used to pass electrons and holes therethrough is formed with the same surface orientation as that of the region of the third semiconductor element.

3. A semiconductor device according to claim 2 ; wherein the boundary surface between the silicon substrate and the silicon oxide film is inclined by 1 to 4 degrees from the <100>surface orientation toward a surface orientation of <010>.

4. A semiconductor device according to claim 1 ; wherein the surface orientation of the region of the third semiconductor element is inclined by 1 to 4 degrees from the <100>surface orientation toward a surface orientation of <010>.

5. A semiconductor device comprising:

an NMOS transistor formed on a silicon substrate and having a channel region formed with a surface orientation of <100>;

a PMOS transistor formed on the silicon substrate and having a channel region formed with a surface orientation of <110>or <111>; and

a MOS capacitor formed on the silicon substrate and having a gate electrode and at least a region just below the gate electrode that is formed with a surface orientation different from that of the channel region of each of the NMOS transistor and the PMOS transistor.

6. A semiconductor device according to claim 5 ; further comprising a silicon oxide film formed on the silicon substrate; and wherein at least a part of a boundary surface between the silicon substrate and the silicon oxide film used to pass electrons and holes therethrough is formed with the same surface orientation as that of the region of the MOS capacitor.

7. A semiconductor device according to claim 6 ; wherein the boundary surface between the silicon substrate and the silicon oxide film is inclined by 1 to 4 degrees from the <100>surface orientation toward a surface orientation of <010>.

8. A semiconductor device according to claim 5 ; wherein the surface orientation of the region of the MOS capacitor is inclined by 1 to 4 degrees from the <100>surface orientation toward a surface orientation of <010>.

9. A semiconductor device comprising: an NMOS transistor having a channel region formed with a surface orientation of <100>; a PMOS transistor having a channel region formed with a surface orientation of <110>or <111>; and a memory cell having a region formed with a surface orientation that is inclined by 1 to 4 degrees from the <100>surface orientation toward a surface orientation of <010>.

10. A semiconductor device according to claim 9 ; wherein the region of the memory cell comprises a formation region of a tunnel oxide film of the memory cell.

11. A semiconductor device according to claim 10 ; wherein the tunnel oxide film comprises a silicon oxide film.

12. A semiconductor device according to claim 9 ; wherein the region of the memory cell comprises at least a boundary surface of a gate oxide film in a drain end portion in which electric charges are exchanged.

Assignments (3)
CHANGE OF NAME Recorded Mar 12, 2018
From: SII SEMICONDUCTOR CORPORATION
To: ABLIC INC.
Reel/Frame 045567/0927 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 10, 2016
From: SEIKO INSTRUMENTS INC.
To: SII SEMICONDUCTOR CORPORATION
Reel/Frame 038058/0892 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 17, 2008
From: SAKURAI, HITOMI
To: SEIKO INSTRUMENTS INC.
Reel/Frame 020833/0529 →