IP Library Patent Application 12015963
Patent Application
App. No. 12/015,963

SYSTEM AND METHOD FOR JITTER BUFFER REDUCTION IN SCALABLE CODING

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Quick Facts
Patent No.
US None
App. No.
12/015,963
Abstract

Jitter buffer arrangements for video and audio communications networks include a plurality of jitter buffers each of which is designated to buffer a particular layer scalably coded data streams, and coupled decoder to decode the received scalably coded data stream layer-by-layer.

Claims (23)

1 . A jitter buffer arrangement for a receiving endpoint in an electronic communications network, the arrangement comprising:

a plurality of jitter buffers wherein each jitter buffer is designated to buffer a particular layer of a received scalably coded data stream, and

a decoder coupled to the plurality of jitter buffers, wherein the decoder is configured to decode the received scalably coded data stream layer-by-layer.

2 . The jitter buffer arrangement of claim 1 wherein the scalably coded data stream comprises at least one of a video data stream, an audio data stream or a combination thereof.

3 . The jitter buffer arrangement of claim 1 wherein the plurality of jitter buffers precedes the decoder.

4 . The jitter buffer arrangement of claim 1 wherein the plurality of jitter buffers succeeds the decoder and buffers the decoder output layer-by-layer.

5 . The jitter buffer arrangement of claim 1 wherein the plurality of jitter buffers each has a design length, and wherein at least two jitter buffers have different design lengths.

6 . The jitter buffer arrangement of claim 1 wherein the plurality of jitter buffers each has a length, which is adjusted dynamically in response to network conditions.

7 . The jitter buffer arrangement of claim 1 wherein a first and second jitter buffers are designated to buffer a base layer and an enhancement layer, respectively.

8 . The jitter buffer arrangement of claim 7 wherein the design lengths of the first and second jitter buffers are based on a statistical estimate of jitter in video streams received over the network.

9 . The jitter buffer arrangement of claim 7 wherein the design length of the first buffer is a fraction of the design length of the second jitter buffer.

10 . A method for managing jitter buffer delay at a receiving endpoint in an electronic communications network, the method comprising:

providing a plurality of jitter buffers, wherein each jitter buffer is designated to buffer a particular layer of a received scalably coded data stream, and

coupling a decoder to the plurality of jitter buffers, wherein the decoder is configured to decode the received scalably coded data stream layer-by-layer.

11 . The method of claim 10 wherein the scalably coded data stream comprises at least one of a video data stream, an audio data stream and a combination thereof.

12 . The method of claim 10 wherein the plurality of jitter buffers precedes the coupled decoder.

13 . The method of claim 10 wherein the plurality of jitter buffers succeeds the coupled decoder, the method further comprising buffering the decoder output layer-by-layer.

14 . The method of claim 10 wherein providing a plurality of jitter buffers comprises providing a plurality of jitter buffers each having a design length, and wherein at least two jitter buffers have different design lengths.

15 . The method of claim 10 wherein providing a plurality of jitter buffers comprises providing a plurality of jitter buffers each having a design length, and further comprises adjusting the design lengths dynamically in response to network conditions.

16 . The method of claim 10 wherein providing a plurality of jitter buffers comprises providing a first and a second jitter buffer designated to buffer a base layer and an enhancement layer, respectively.

17 . The method of claim 16 further comprising assigning the design lengths for the jitter buffers based on a statistical estimate of jitter in transmitted video streams on the network.

18 . The method of claim 16 further comprising assigning a design length to the first buffer, which is a fraction of the design length assigned to the second jitter buffer.

19 . Computer readable media comprising a set of instructions to perform the steps recited in at least one of claims 10 - 18 .

Assignments (3)
RELEASE OF SECURITY INTEREST Recorded Jul 26, 2018
From: VENTURE LENDING AND LEASING VI, INC.
To: VIDYO, INC.
Reel/Frame 046634/0325 →
SECURITY AGREEMENT Recorded Nov 13, 2012
From: VIDYO, INC.
To: VENTURE LENDING & LEASING VI, INC.
Reel/Frame 029291/0306 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 19, 2008
From: CIVANLAR, REHA; SHAPIRO, OFER; ELEFTHERIADIS, ALEXANDROS
To: VIDYO, INC.
Reel/Frame 020672/0059 →