Hybrid zero-IF receiver
View Patent ↗An apparatus for processing a Bluetooth signal advantageously mixes down a received RF signal to an IF signal wherein one band-edge of the spectrum of the IF signal may be approximately 0 Hz. In one embodiment, the IF signal may be digitized, decimated and filtered before being processed into a baseband signal. The baseband signal may be processed by a cordic (COordinate Rotation DIgital Computer) processor to transform the baseband signal from rectangular to polar coordinates. A phase signal from the cordic processor may be used to determine transmitted Bluetooth data symbols. The apparatus may advantageously use less area than traditional Bluetooth receivers.
1. A method for processing a Bluetooth signal, the method comprising:
receiving an RF signal;
mixing the RF signal with a first frequency to produce a first signal;
low-pass filtering the first signal to produce an intermediate frequency (IF) signal; and
processing the IF signal to recover transmitted symbols, wherein the processing includes:
digitizing the IF signal to produce a digital IF signal;
filtering the digital IF signal with a low-pass filter;
decimating the low-pass filtered digital IF signal to produce a decimated IF signal;
subtracting an estimated DC offset from the decimated IF signal to produce a corrected IF signal;
mixing the corrected IF signal with a second frequency to produce a baseband signal;
transforming the baseband signal to polar coordinates including amplitude and phase to produce a transformed baseband signal;
using differences of the amplitude of currently selected and adjacent sub-samples to change a timing of the baseband signal and modify the phase of the transformed baseband signal; and
recovering the transmitted symbols from the modified transformed baseband signal.
2. The method of claim 1 , wherein the received RF signal is between 2401 and 2481 MHz.
3. The method of claim 1 , wherein the received RF signal is between 2401 and 2481 MHz.
4. The method of claim 1 , wherein the second frequency is 500 KHz.
5. The method of claim 1 , wherein a frequency response of the low-pass filter is described by
H
MA
(
ω
)
=
[
ⅇ
-
j
3
2
ω
sin
(
2
ω
)
sin
(
ω
)
]
4
.
6. The method of claim 1 , wherein the IF signal is digitized with a ΣΔ ADC.
7. The method of claim 1 , wherein the estimated DC offset is estimated with a configurable filter.
8. The method of claim 7 , wherein the configurable filter has a response described by
H
(
z
)
=
1
/
α
1
-
(
1
-
1
/
α
)
z
-
1
where α is a user selectable parameter.
9. The method of claim 8 , wherein α is a programmable value.
10. A Bluetooth receiver comprising:
a first mixer configured to mix a received RF signal with a first frequency to produce a first signal;
a low-pass filter configured to filter the first signal and to produce a low-pass filtered first signal;
an ADC configured to sample the low-pass filtered first signal and to produce a digital IF signal;
a down-sampler configured to decimate the digital IF signal and to produce a decimated, digital IF signal;
a DC offset estimator configured to estimate a DC offset included in the decimated, digital IF signal;
an adder configured to subtract the estimated DC offset from the decimated, digital IF signal and to produce a corrected digital IF signal;
a second mixer configured to mix the corrected digital IF signal with a second frequency and to produce a baseband signal;
a cordic (COordinate Rotation DIgital Computer) processor configured to produce a phase signal from the baseband signal;
a phase adjuster configured to receive a phase output of the cordic processor;
a timing tracker configured to compare amplitude differences output by the cordic processor, change a timing of data generated by the down-sampler, and modify a phase signal through the phase adjuster; and
a symbol detector configured to determine transmitted symbols in the baseband signal as transformed by the phase adjuster.
11. The receiver of claim 10 , wherein the received RF signal is between 2401 and 2481 MHz.
12. The receiver of claim 10 , wherein the second frequency is 500 KHz.
13. The receiver of claim 10 , wherein the ADC is a ΣΔ ADC.
14. The receiver of claim 10 , wherein the ADC samples I and Q components.
15. The receiver of claim 10 , wherein the DC offset estimator is implemented with a configurable filter.
16. The receiver of claim 15 , wherein the configurable filter has a response described by
H
(
z
)
=
1
/
α
1
-
(
1
-
1
/
α
)
z
-
1
wherein α is a user selectable parameter.
17. The method of claim 16 , wherein α is a programmable value.
18. The receiver of claim 10 , further comprising a pulse shaping filter configured to filter the baseband signal, the pulse shaping filter having a response that matches a root-raised cosine filter.