IP Library Granted Patent US 7,649,578
Granted Patent B2
US 7,649,578 · App. 12/017,835 · Granted Jan 19, 2010

Array substrate and display panel having the same with particular sensor electrodes

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Quick Facts
Patent No.
US 7,649,578
App. No.
12/017,835
Granted
Jan 19, 2010
Kind
B2
Abstract

An array substrate includes a gate line, a data line, a thin-film transistor (TFT), a pixel electrode, a first sensor line, a second sensor line and a sensor electrode part. The TFT is electrically connected to the gate and data lines. The pixel electrode is formed in a unit area defined by the gate and data lines. The pixel electrode is electrically connected to the TFT. The first sensor line is substantially parallel with the gate line. The second sensor line is substantially parallel with the data line. The sensor electrode part is formed in the unit area and electrically connected to the first and second sensor lines. The sensor electrode part is adjacent to the pixel electrode in a large axis direction of the unit area.

Claims (103)

1. An array substrate comprising:

a gate line formed in a first direction;

a data line formed in a second direction crossing the first direction;

a thin-film transistor (TFT) electrically connected to the gate and data lines;

a pixel electrode formed in a unit area defined by the gate and data lines, the pixel electrode electrically connected to the TFT;

a first sensor line substantially parallel with the gate line;

a second sensor line substantially parallel with the data line; and

a sensor electrode part formed in the unit area to be electrically connected to the first and second sensor lines, the sensor electrode part disposed adjacent to the pixel electrode in a large axis direction of the unit area.

2. The array substrate of claim 1 , wherein the gate line and first sensor line are formed on a base substrate and are covered by a gate insulation layer,

the data line and second sensor line are formed on the gate insulation layer and are covered by a protection layer, and

the pixel electrode and sensor electrode part are formed on the protection layer.

3. The array substrate of claim 2 , wherein the first sensor line comprises:

a first sensor main line formed in the first direction; and

a first sensor protrusion electrode that is protruded from the first sensor main line in the second direction, and

the second sensor line comprises:

a second sensor main line formed in the second direction; and

a second sensor protrusion electrode that is protruded from the second sensor main line in the first direction to face the first sensor protrusion electrode.

4. The array substrate of claim 3 , wherein the sensor electrode part comprises:

a first sensor main electrode formed on the protection layer and overlapped with the first sensor protrusion electrode, and electrically connected to the first sensor protrusion electrode through a first contact hole formed through the protection layer; and

a second sensor main electrode formed on the protection layer and overlapped with the second sensor protrusion electrode, and electrically connected to the second sensor protrusion electrode through a second contact hole formed through the protection layer.

5. The array substrate of claim 4 , wherein a length of the first direction of the first and second sensor main electrodes is greater than a length of the second direction of the first and second sensor main electrodes.

6. The array substrate of claim 3 , further comprising:

a first sensor dummy electrode formed on the base substrate corresponding to the second sensor protrusion electrode, the first sensor dummy electrode covered by the gate insulation layer; and

a second sensor dummy electrode formed on the gate insulation layer corresponding to the first sensor protrusion electrode, the second sensor dummy electrode covered by the protection layer.

7. The array substrate of claim 6 , wherein a size of the second sensor dummy electrode is smaller than a size of the first sensor protrusion electrode.

8. The array substrate of claim 7 , wherein a first contact hole is formed in a gate insulation layer and a protection layer at one end of the first sensor protrusion electrode to expose a portion of the first sensor protrusion electrode, and the second sensor dummy electrode is disposed on the gate insulation layer corresponding to an opposite end of the first sensor protrusion electrode.

9. The array substrate of claim 6 , wherein a size of the first sensor dummy electrode is greater than a size of the second sensor protrusion electrode.

10. The array substrate of claim 9 , wherein a length of the first direction of the first sensor dummy electrode is longer than a length of the second direction of the first sensor dummy electrode.

11. The array substrate of claim 1 , wherein a plurality of unit areas is formed in a matrix shape, and each of the pixel electrodes is formed in the unit areas, and

the sensor electrode part is formed adjacent to the pixel electrode in a portion of the unit areas.

12. The array substrate of claim 11 , wherein a size of the pixel electrodes formed in each unit area is the same.

13. The array substrate of claim 12 , wherein the pixel electrodes comprise:

a plurality of first pixel electrodes formed in first unit areas, in which the sensor electrode part is not formed; and

a plurality of second pixel electrodes formed in second unit areas, in which the sensor electrode part is formed, and

wherein a width of the first direction of the first pixel electrodes is shorter than a width of the first direction of the second pixel electrodes, and a length of the second direction of the first pixel electrodes is longer than a length of the second direction of the second pixel electrodes.

14. A display panel comprising:

an array substrate;

an opposite substrate facing the array substrate; and

a liquid crystal layer interposed between the array substrate and the opposite substrate, wherein the array substrate comprises:

a gate line formed in a first direction;

a data line formed in a second direction crossing the first direction;

a thin-film transistor (TFT) electrically connected to the gate and data lines;

a pixel electrode formed in a unit area defined by the gate and data lines, the pixel electrode electrically connected to the TFT;

a first sensor line substantially parallel with the gate line;

a second sensor line substantially parallel with the data line; and

a sensor electrode part formed in the unit area to be electrically connected to the first and second sensor lines, the sensor electrode part adjacent to the pixel electrode in a large axis direction of the unit area.

15. The display panel of claim 14 , wherein the first sensor line comprises:

a first sensor main line formed in the first direction, and

a first sensor protrusion electrode that is protruded from the first sensor main line in the second direction,

the second sensor line comprises:

a second sensor main line formed in the second direction, and

a second sensor protrusion electrode that is protruded from the second sensor main line in the first direction to face the first sensor protrusion electrode, and

the array substrate further comprises:

a first sensor dummy electrode formed below the second sensor protrusion electrode and overlapped with the second sensor protrusion electrode; and

a second sensor dummy electrode formed on the first sensor protrusion electrode and overlapped with the first sensor protrusion electrode.

16. The display panel of claim 14 , wherein the opposite substrate comprises:

an over-coating layer having a sensor protrusion protruding toward the sensor electrode part; and

a common electrode formed on the over-coating layer.

17. The display panel of claim 16 , wherein a length of the first direction of the sensor electrode part is greater than that of the second direction of the sensor electrode part.

18. The display panel of claim 17 , wherein a length of the sensor protrusion corresponds to a length of the sensor electrode part.

19. The display panel of claim 18 , wherein a length of the first direction of the sensor protrusion is about 30 micrometers to about 60 micrometers.

20. The display panel of claim 14 , wherein the opposite substrate further comprises:

a light-blocking layer formed on a surface of a base substrate of the opposite substrate; and

a color filter formed on the opposite substrate to cover the light-blocking layer, the color filter covered by the over-coating layer.

21. An array substrate comprising:

a gate line formed in a first direction;

a data line formed in a second direction crossing the first direction;

a thin-film transistor (TFT) electrically connected to the gate and data lines;

a pixel electrode formed in a unit area defined by the gate and data lines, the pixel electrode electrically connected to the TFT;

a first sensor line substantially parallel with the gate line;

a second sensor line substantially parallel with the data line; and

a sensor electrode part formed at an intersecting region of the first and second sensor lines of the unit area, the sensor electrode part electrically connected to the first and second sensor lines.

22. The array substrate of claim 21 , wherein the sensor electrode part is formed adjacent to the pixel electrode in a large axis of the unit area.

23. The array substrate of claim 22 , wherein the gate line and first sensor line are formed on the base substrate and covered by a gate insulation layer,

the data line and the second sensor line are formed on the gate insulation layer and covered by a protection layer, and

the pixel electrode and the sensor electrode part are formed on the protection layer.

24. The array substrate of claim 23 , wherein the first sensor line comprises:

a first sensor main line formed in the first direction; and

a first sensor protrusion electrode that is protruded from the first sensor main line in the second direction, and

the second sensor line comprises:

a second sensor main line formed in the second direction; and

a second sensor protrusion electrode that is protruded from the second sensor main line in the first direction to face the first sensor protrusion electrode.

25. The method of claim 24 , wherein the first sensor line comprises:

a first sensor main line formed in the first direction; and

a first sensor protrusion electrode that is protruded from the first sensor main line in the second direction, and

the second sensor line comprises:

a second sensor main line formed in the second direction; and

a second sensor protrusion electrode that is protruded from the second sensor main line in the first direction to face the first sensor protrusion electrode.

26. The array substrate of claim 25 , further comprising:

a first sensor dummy electrode formed on the base substrate and corresponding to the second sensor protrusion electrode, the first sensor dummy electrode covered by the gate insulation layer; and

a second sensor dummy electrode formed on the gate insulation layer and corresponding to the first sensor protrusion electrode, the second sensor dummy electrode covered by the protection layer.

27. A display panel comprising:

an array substrate;

an opposite substrate facing the array substrate; and

a liquid crystal layer interposed between the array substrate and the opposite substrate, wherein the array substrate comprises:

a gate line formed in a first direction;

a data line formed in a second direction crossing the first direction;

a thin-film transistor (TFT) electrically connected to the gate and data lines;

a pixel electrode formed in a unit area defined by the gate and data lines, the pixel electrode electrically connected to the TFT;

a first sensor line substantially parallel with the gate line;

a second sensor line substantially parallel with the data line; and

a sensor electrode part formed at an intersecting region of the first and second sensor lines of the unit area, the sensor electrode part electrically connected to the first and second sensor lines.

28. The display panel of claim 27 , wherein the sensor electrode part is formed adjacent to the pixel electrode in a large axis direction of the unit area.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 27, 2012
From: SAMSUNG ELECTRONICS CO., LTD.
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 029093/0177 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 22, 2008
From: KWON, SUN-JA; UH, KEE-HAN; JUNG, MIN-KYUNG
To: SAMSUNG ELECTRONICS CO., LTD
Reel/Frame 020396/0779 →