IP Library Patent Application 12018454
Patent Application
App. No. 12/018,454

METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

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Patent No.
US None
App. No.
12/018,454
Abstract

The present invention has an object of providing a method for manufacturing a semiconductor device which can prevent occurrence of pattern abnormality of an electrode and deterioration of an electronic property. The method for manufacturing the semiconductor device including a GaAs substrate with a portion made of GaAs includes: forming a Ti/Pt/Au/Ti electrode on the GaAs substrate, the electrode including Pt and having a layered structure in which a top layer made of Ti; forming a collector electrode including AuGe on a portion made of GaAs; and performing heat treatment on the collector electrode in a state where both of the Ti/Pt/Au/Ti electrode and the collector electrode are exposed to a surface.

Claims (26)

1 . A method for manufacturing a semiconductor device which includes a semiconductor substrate having a portion made of GaAs, said method comprising:

forming a first electrode on the semiconductor substrate, the first electrode including Pt and having a layered structure in which a top layer is made of Ti;

forming a second electrode including AuGe on the portion made of GaAs; and

performing heat treatment on the second electrode in a state where the first electrode and the second electrode are exposed to a surface.

2 . The method for manufacturing the semiconductor device according to claim 1 ,

wherein, in said forming of the first electrode, the first electrode having the top layer of Ti is formed, the top layer having a film thickness between 5 nm and 15 nm inclusive.

3 . The method for manufacturing the semiconductor according to claim 1 ,

wherein, in said forming of the second electrode, a backside via hole stopper metal is formed on the semiconductor substrate concurrently with the formation of the first electrode.

4 . The method for manufacturing the semiconductor device according to claim 1 ,

wherein, in said performing of the heat treatment, the heat treatment is performed at a temperature between 360° C. and 420° C. inclusive.

5 . The method for manufacturing the semiconductor device according to claim 4 , further comprising:

forming an interlayer film on both of the first electrode and the second electrode after performing the heat treatment; and

removing a part of the interlayer film in order to connect both of the first electrode and the second electrode to a lead wiring.

6 . The method for manufacturing the semiconductor device according to claim 5 ,

wherein, in said removing, the top layer of Ti of the first electrode is removed concurrently with the removing of the part of the interlayer film.

7 . The method for manufacturing the semiconductor device according to claim 6 ,

wherein the semiconductor device is a heterojunction bipolar transistor.

8 . The method for manufacturing the semiconductor device according to claim 6 ,

wherein the semiconductor device is a field-effect transistor.

9 . The method for manufacturing the semiconductor device according to claim 1 , further comprising:

forming an interlayer film on both of the first electrode and the second electrode after performing the heat treatment; and

removing a part of the interlayer film in order to connect both of the first electrode and the second electrode to a lead wiring.

10 . The method for manufacturing the semiconductor device according to claim 1 ,

wherein the semiconductor device is a heterojunction bipolar transistor.

11 . The method for manufacturing the semiconductor device according to claim 1 ,

wherein the semiconductor device is a field-effect transistor.

Assignments (2)
CHANGE OF NAME Recorded Nov 20, 2008
From: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
To: PANASONIC CORPORATION
Reel/Frame 021897/0516 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 27, 2008
From: MIYAMOTO, HIROTAKA; TAMURA, AKIYOSHI; MURAYAMA, KEIICHI; MIYAJIMA, KENICHI
To: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
Reel/Frame 021001/0559 →