Method of manufacturing display device
View Patent ↗A method of manufacturing a display device reduces damage to pad electrodes. The method includes: forming a thin film transistor in a pixel area on a first substrate and simultaneously forming a pad electrode in a pad area on the first substrate; forming a first pixel electrode connected to the thin film transistor and simultaneously forming a pad protection layer covering the pad electrode; and exposing the pad electrode by removing the pad protection layer.
1. A method for manufacturing a display device, comprising:
forming a thin film transistor in a pixel area on a first substrate and simultaneously forming a pad electrode in a pad area on the first substrate;
forming a first pixel electrode coupled to the thin film transistor and simultaneously forming a pad protection layer covering the pad electrode; and
exposing the pad electrode by removing the pad protection layer.
2. The method of claim 1 , wherein the first pixel electrode comprises Ag.
3. The method of claim 2 , wherein the first pixel electrode includes a first transparent conductive layer, a reflective layer, and a second transparent conductive layer, and the reflective layer comprises Ag.
4. The method of claim 1 , further comprising forming an organic emission layer and a second pixel electrode on the first pixel electrode.
5. The method of claim 1 , further comprising bonding a second substrate onto the first substrate before the pad protection layer is removed.
6. The method of claim 5 , wherein the pad protection layer is removed by wet etching.
7. The method of claim 1 , wherein forming of the thin film transistor comprises:
forming sequentially, an active layer, a gate insulating layer, and a gate electrode on the first substrate;
forming an interlayer insulating layer on the gate insulating layer, covering the gate electrode; and
forming a source electrode and a drain electrode on the interlayer insulating layer.
8. The method of claim 7 , wherein the gate electrode and the pad electrode are substantially simultaneously formed from the same material.
9. The method of claim 8 , wherein the pad electrode comprises at least one of MoW, Al, Cr, and Al/Cr.
10. The method of claim 8 , further comprising:
forming a planarization layer on the thin film transistor and the pad electrode;
forming a via-hole by patterning the planarization layer, thereby exposing the drain electrode; and
forming a pad contact hole by patterning the planarization layer and the interlayer insulating layer, thereby exposing the pad electrode.
11. The method of claim 7 , wherein the source electrode, the drain electrode, and the pad electrode are substantially simultaneously formed from the same material.
12. The method of claim 11 , wherein the pad electrode comprises at least one of Ti, Ti-alloy, Ta, and Ta-alloy.
13. The method of claim 12 , wherein the Ti-alloy comprises TiN, and the Ta-alloy comprises TaN.
14. The method of claim 11 , further comprising:
forming a planarization layer on the thin film transistor and the pad electrode; and
forming a via-hole, which exposes the drain electrode, and a pad contact hole, which exposes the pad electrode, by patterning the planarization layer.
15. The method of claim 11 , further comprising:
forming a planarization layer on the thin film transistor and the pad electrode;
forming a via-hole and a pad contact hole by patterning the planarization layer, wherein the via-hole exposes the drain electrode, and the pad contact hole exposes the pad electrode.