AD conversion control circuit and related arts

1. An AD conversion control circuit comprising:

a selector for selecting an analog signal group to be used for PWM control out of a plurality of analog signals output by a load PWM controlled based on a PWM control signal of a plurality of phases output by a PWM control circuit according to duty ratios set in a plurality of duty ratio setting registers of the PWM circuit;

an AD converter for AD converting the analog signal group and generating a digital signal group that becomes control data for duty ratio setting in the duty ratio setting register, and providing the generated digital signal group to a control unit for controlling the PWM circuit;

a duty ratio comparison circuit for comparing the duty ratios set by the plurality of duty ratio setting registers; and

an AD conversion channel selection circuit for controlling an analog signal group selecting operation by the selector based on a comparison result of the duty ratio comparison circuit,

wherein the AD conversion channel selection circuit controls the selector by selecting two channels to implement AD conversion based on the comparison result of the duty ratio comparison circuit, and selects the largest duty ratio phase and the second largest duty ratio phase for the two channels to be AD converted.

2. The AD conversion control circuit according to claim 1 , further comprising an AD conversion timing control circuit for controlling a timing to start AD conversion of the AD converter; wherein

a plurality of the AD converters are arranged;

the selector distributes and provides the analog signal group to the plurality of AD converters; and

the AD conversion timing control circuit performs control so that AD conversion processes of the plurality of AD converters to which the analog signal group has been distributed and provided are simultaneously started.

3. The AD conversion control circuit according to claim 2 , wherein

a plurality of PWM circuits operating at carrier periods different from each other are arranged as the PWM circuit, the PWM circuits including a PWM counter for counting a clock signal;

the AD conversion control circuit further includes:

a simultaneous conversion determining circuit for determining whether or not to perform simultaneous conversion control on the plurality of PWM circuits based on the value of the PWM counter; and

an AD conversion timing control circuit for controlling a start timing to AD convert the analog signal in the AD converter; wherein

the AD conversion timing control circuit determines whether or not to perform simultaneous conversion control on the plurality of PWM circuits based on a determination result of the simultaneous conversion determining circuit.

4. The AD conversion control circuit according to claim 3 , further comprising a conversion timing storage register for storing information on a timing at which the analog signal group is AD converted by the AD converter for every analog signal.

5. An integrated circuit comprising:

a PWM circuit;

an AD conversion control circuit; and

a control unit, wherein:

the AD conversion control circuit comprises:

a selector for selecting an analog signal group to be used for PWM control out of a plurality of analog signals output by a load PWM controlled based on a PWM control signal of a plurality of phases output by a PWM control circuit according to duty ratios set in a plurality of duty ratio setting registers of the PWM circuit;

an AD converter for AD converting the analog signal group and generating a digital signal group that becomes control data for duty ratio setting in the duty ratio setting register, and providing the generated digital signal group to a control unit for controlling the PWM circuit;

a duty ratio comparison circuit for comparing the duty ratios set by the plurality of duty ratio setting registers; and

an AD conversion channel selection circuit for controlling an analog signal group selecting operation by the selector based on a comparison result of the duty ratio comparison circuit, and

the AD conversion channel selection circuit controls the selector by selecting two channels to implement AD conversion based on the comparison result of the duty ratio comparison circuit, and selects the largest duty ratio phase and the second largest duty ratio phase for the two channels to be AD converted.

6. The PWM control device according to claim 5 , wherein

the PWM circuit includes:

a carrier period setting register for storing a carrier period;

a PWM counter for counting a clock signal; and

a U-phase duty ratio setting register, a V-phase duty ratio setting register, and a W-phase duty ratio setting register for setting a duty ratio of an PWM output for a U-phase, a V-phase, and a W-phase, respectively.

7. A motor control device comprising:

a motor serving as a load; and

the integrated circuit according to claim 5 .

8. An AD conversion control circuit comprising:

a selector for selecting an analog signal group to be used for PWM control out of a plurality of analog signals output by a load PWM controlled based on a PWM control signal of a plurality of phases output by a PWM control circuit according to duty ratios set in a plurality of duty ratio setting registers of the PWM circuit;

an AD converter for AD converting the analog signal group and generating a digital signal group that becomes control data for duty ratio setting in the duty ratio setting register, and providing the generated digital signal group to a control unit for controlling the PWM circuit;

an AD conversion result storage buffer for storing the digital signal group;

a conversion result comparison circuit for comparing values of the digital signals stored in the AD conversion result storage buffer; and

an AD conversion channel selection circuit for controlling an analog signal group selecting operation by the selector based on a comparison result of the conversion result comparison circuit,

wherein the AD conversion channel selection circuit controls the selector by selecting two channels to implement AD conversion based on the comparison result of the duty ratio comparison circuit, and selects the largest duty ratio phase and the second largest duty ratio phase for the two channels to be AD converted.

9. The AD conversion control circuit according to claim 8 , further comprising an AD conversion timing control circuit for controlling a timing to start AD conversion of the AD converter; wherein

a plurality of the AD converters are arranged;

the selector distributes and provides the analog signal group to the plurality of AD converters; and

the AD conversion timing control circuit performs a control so that AD conversion processes of the plurality of AD converters to which the analog signal group has been distributed and provided are simultaneously started.

10. The AD conversion control circuit according to claim 9 , wherein

a plurality of PWM circuits operating at carrier periods different from each other are arranged in place of the PWM circuit, the PWM circuits each including a PWM counter for counting a clock signal;

the AD conversion control circuit further includes:

a simultaneous conversion determining circuit for determining whether or not to perform simultaneous conversion control on the plurality of PWM circuits based on the value of the PWM counter; and

an AD conversion timing control circuit for controlling a start timing to AD convert the analog signal in the AD converter; and

the AD conversion timing control circuit determines whether or not to perform simultaneous conversion control on the plurality of PWM circuits based on a determination result of the simultaneous conversion determining circuit.

11. The AD conversion control circuit according to claim 10 , further comprising a conversion timing storage register for storing information on a timing the analog signal group is AD converted by the AD converter for every analog signal.

12. An integrated circuit comprising:

a PWM circuit;

an AD conversion control circuit; and

a control unit, wherein:

the AD conversion control circuit comprises:

a selector for selecting an analog signal group to be used for PWM control out of a plurality of analog signals output by a load PWM controlled based on a PWM control signal of a plurality of phases output by a PWM control circuit according to duty ratios set in a plurality of duty ratio setting registers of the PWM circuit;

an AD converter for AD converting the analog signal group and generating a digital signal group that becomes control data for duty ratio setting in the duty ratio setting register, and providing the generated digital signal group to a control unit for controlling the PWM circuit;

an AD conversion result storage buffer for storing the digital signal group;

a conversion result comparison circuit for comparing values of the digital signals stored in the AD conversion result storage buffer; and

an AD conversion channel selection circuit for controlling an analog signal group selecting operation by the selector based on a comparison result of the conversion result comparison circuit, and

the AD conversion channel selection circuit controls the selector by selecting two channels to implement AD conversion based on the comparison result of the duty ratio comparison circuit, and selects the largest duty ratio phase and the second largest duty ratio phase for the two channels to be AD converted.

13. The PWM control device according to claim 12 , wherein

the PWM circuit includes:

a carrier period setting register for storing a carrier period;

a PWM counter for counting a clock signal; and

a U-phase duty ratio setting register, a V-phase duty ratio setting register, and a W-phase duty ratio setting register for setting a duty ratio of an PWM output for a U-phase, a V-phase, and a W-phase, respectively.

14. A motor control device comprising:

a motor serving as a load; and

the integrated circuit according to claim 12 .