System and method for dynamic drain voltage adjustment to control linearity, output power, and efficiency in RF power amplifiers
View Patent ↗A system and method for dynamic adjustment of drain or collector voltage of a power amplifier (PA), including a PA having a voltage input, a temperature sensor measuring ambient temperature of the PA, and an adaptive PA control processor that dynamically changes the input voltage based on the ambient temperature, achieving a desired peak power when the system is subjected to high temperatures. In a further embodiment, a power sensor measures output power of the PA, and the control processor dynamically changes the voltage based on output power when the system serves a large cell in a mobile communication infrastructure employing high power. In a further embodiment, a multistage PA and method include amplifier stages having drain or collector voltage inputs, wherein a voltage applied to the inputs are set so as to be proportional to the peak power requirements of each stage, enhancing overall efficiency.
1. A system for dynamic adjustment of drain or collector voltage of a power amplifier, the system comprising:
a power amplifier having a drain or collector voltage input;
a temperature sensor configured to measure ambient temperature of the power amplifier;
an adaptive power amplifier control processor configured to dynamically change a drain or collector voltage applied to the input of the power amplifier as a function of ambient temperature of the power amplifier measured by the temperature sensor to achieve a desired peak power when the system is subjected to higher than normal ambient temperature; and
a power amplifier amplitude to amplitude (AA) monitor configured to digitally analyze a transmit amplitude of the power amplifier to a receive amplitude of the power amplifier to determine output signal compression of the power amplifier,
wherein the adaptive power amplifier control processor is configured to dynamically change the drain or collector voltage applied to the input of the power amplifier as a function of the determined output signal compression.
2. The system of claim 1 , wherein the power amplifier includes a power field effect transistor (FET), including one of a laterally diffused MOS (LDMOS) transistor, and a gallium nitride transistor, and
the adaptive power amplifier control processor is configured to dynamically change the drain voltage applied to the input of the power amplifier.
3. The system of claim 1 , wherein the power amplifier includes a bipolar junction (BJ) transistor, and
the adaptive power amplifier control processor is configured to dynamically change the collector voltage applied to the input of the power amplifier.
4. A system for dynamic adjustment of drain or collector voltage of a power amplifier, the system comprising:
a power amplifier having a drain or collector voltage input;
a temperature sensor configured to measure ambient temperature of the power amplifier;
an adaptive power amplifier control processor configured to dynamically change a drain or collector voltage applied to the input of the power amplifier as a function of ambient temperature of the power amplifier measured by the temperature sensor to achieve a desired peak power when the system is subjected to higher than normal ambient temperature; and
a power amplifier spectral emissions mask (SEM) monitor configured to digitally analyze a feedback signal of the power amplifier to determine power amplifier linearization performance,
wherein the adaptive power amplifier control processor is configured to dynamically change the drain or collector voltage applied to the input of the power amplifier as a function of the determined linearization performance.
5. The system of claim 4 , wherein the power amplifier includes a power field effect transistor (FET), including one of a laterally diffused MOS (LDMOS) transistor, and a gallium nitride transistor, and
the adaptive power amplifier control processor is configured to dynamically change the drain voltage applied to the input of the power amplifier.
6. The system of claim 4 , wherein the power amplifier includes a bipolar junction (BJ) transistor, and
the adaptive power amplifier control processor is configured to dynamically change the collector voltage applied to the input of the power amplifier.
7. A method for dynamic adjustment of drain or collector voltage of a power amplifier having a drain or collector voltage input, the method comprising:
measuring by a temperature sensor ambient temperature of the power amplifier;
dynamically changing by an adaptive power amplifier control processor a drain or collector voltage applied to the input of the power amplifier as a function of ambient temperature of the power amplifier measured by the temperature sensor to achieve a desired peak power when subjected to higher than normal ambient temperature;
digitally analyzing by a power amplifier amplitude to amplitude (AA) monitor a transmit amplitude of the power amplifier to a receive amplitude of the power amplifier to determine output signal compression of the power amplifier; and
dynamically changing the adaptive power amplifier control processor the drain or collector voltage applied to the input of the power amplifier as a function of the determined output signal compression.
8. The method of claim 7 , wherein the power amplifier includes a power field effect transistor (FET), including one of a laterally diffused MOS (LDMOS) transistor, and a gallium nitride transistor, and
the method further comprises dynamically changing by the adaptive power amplifier control processor the drain voltage applied to the input of the power amplifier.
9. The method of claim 7 , wherein the power amplifier includes a bipolar junction (BJ) transistor, and
the method further comprises dynamically changing by the adaptive power amplifier control processor the collector voltage applied to the input of the power amplifier.
10. A computer program product for dynamic adjustment of drain or collector voltage of a power amplifier having a drain or collector voltage input, and including one or more computer readable instructions embedded on a tangible computer readable medium and configured to cause one or more computer processors to perform the steps of:
measuring by a temperature sensor ambient temperature of the power amplifier;
dynamically changing by an adaptive power amplifier control processor a drain or collector voltage applied to the input of the power amplifier as a function of ambient temperature of the power amplifier measured by the temperature sensor to achieve a desired peak power when subjected to higher than normal ambient temperature;
digitally analyzing by a power amplifier amplitude to amplitude (AA) monitor a transmit amplitude of the power amplifier to a receive amplitude of the power amplifier to determine output signal compression of the power amplifier; and
dynamically changing the adaptive power amplifier control processor the drain or collector voltage applied to the input of the power amplifier as a function of the determined output signal compression.
11. The computer program product of claim 10 , wherein the power amplifier includes a power field effect transistor (FET), including one of a laterally diffused MOS (LDMOS) transistor, and a gallium nitride transistor, and
further comprising dynamically changing by the adaptive power amplifier control processor the drain voltage applied to the input of the power amplifier.
12. The computer program product of claim 10 , wherein the power amplifier includes a bipolar junction (BJ) transistor, and
further comprising dynamically changing by the adaptive power amplifier control processor the collector voltage applied to the input of the power amplifier.
13. A method for dynamic adjustment of drain or collector voltage of a power amplifier having a drain or collector voltage input, the method comprising:
measuring by a temperature sensor ambient temperature of the power amplifier;
dynamically changing by an adaptive power amplifier control processor a drain or collector voltage applied to the input of the power amplifier as a function of ambient temperature of the power amplifier measured by the temperature sensor to achieve a desired peak power when subjected to higher than normal ambient temperature;
digitally analyzing by a power amplifier spectral emissions mask (SEM) monitor a feedback signal of the power amplifier to determine power amplifier linearization performance; and
dynamically changing by the adaptive power amplifier control processor the drain or collector voltage applied to the input of the power amplifier as a function of the determined linearization performance.
14. The method of claim 13 , wherein the power amplifier includes a power field effect transistor (FET), including one of a laterally diffused MOS (LDMOS) transistor, and a gallium nitride transistor, and
the method further comprises dynamically changing by the adaptive power amplifier control processor the drain voltage applied to the input of the power amplifier.
15. The method of claim 13 , wherein the power amplifier includes a bipolar junction (BJ) transistor, and
the method further comprises dynamically changing by the adaptive power amplifier control processor the collector voltage applied to the input of the power amplifier.
16. A computer program product for dynamic adjustment of drain or collector voltage of a power amplifier having a drain or collector voltage input, and including one or more computer readable instructions embedded on a tangible computer readable medium and configured to cause one or more computer processors to perform the steps of:
measuring by a temperature sensor ambient temperature of the power amplifier;
dynamically changing by an adaptive power amplifier control processor a drain or collector voltage applied to the input of the power amplifier as a function of ambient temperature of the power amplifier measured by the temperature sensor to achieve a desired peak power when subjected to higher than normal ambient temperature;
digitally analyzing by a power amplifier spectral emissions mask (SEM) monitor a feedback signal of the power amplifier to determine power amplifier linearization performance; and
dynamically changing by the adaptive power amplifier control processor the drain or collector voltage applied to the input of the power amplifier as a function of the determined linearization performance.
17. The computer program product of claim 16 , wherein the power amplifier includes a power field effect transistor (FET), including one of a laterally diffused MOS (LDMOS) transistor, and a gallium nitride transistor, and
further comprising dynamically changing by the adaptive power amplifier control processor the drain voltage applied to the input of the power amplifier.
18. The computer program product of claim 16 , wherein the power amplifier includes a bipolar junction (BJ) transistor, and
further comprising dynamically changing by the adaptive power amplifier control processor the collector voltage applied to the input of the power amplifier.