Digital pulse frequency/pulse amplitude (DPFM/DPAM) controller for low-power switching-power supplies
View Patent ↗A digital controller for dc-dc switching converters can operate under light load conditions. The controller can be suitable for the use in switch-mode power supplies providing regulated output voltage for handheld devices and other low-power electronics. To create long time intervals, compared to the propagation time of digital logic a DPFM/DPAM can use a ring oscillator with two sets of delay cells and two signals racing around the ring.
1. A digital modulator comprising:
a delay line that sets the time on of an output signal of the digital modulator; and
circuitry to set the period of the output signal of the digital modulator, the circuitry including a ring oscillator with slow delay cells used to set a positive edge of a pulse through the ring oscillator and fast delay cells to set a negative edge of the pulse through the ring oscillator, wherein the pulse width narrows over time; and
wherein the circuitry includes an end-of-race detector that detects the end of the period and outputs a clock signal.
2. The digital modulator of claim 1 , wherein the digital modulator is a Digital Pulse Frequency Monitor (DPFM).
3. The digital modulator of claim 1 , wherein the digital modulator is a Digital Pulse Frequency/Pulse Amplitude (DPFM/DPAM).
4. The digital modulator of claim 1 , wherein the ring oscillator includes SR latches connected to the fast and slow delay cells.
5. The digital modulator of claim 1 , wherein the delay in the delay line is adjustable.
6. The digital modulator of claim 1 , wherein the digital modulator does not include a counter.
7. The digital modulator of claim 1 , wherein the speed of the pulse narrowing in the ring oscillator is adjustable to adjust the period.
8. The digital modulator of claim 1 , wherein the delay of at least one of the slow delay or fast delay cells is adjustable to adjust the period.
9. The digital modulator of claim 1 , wherein the delay of the slow delay cells is adjustable to adjust the period.
10. A digital modulator comprising:
a delay line that sets the time on of an output signal of the digital modulator;
circuitry to set the period of the output signal of the digital modulator, the circuitry including a ring oscillator with slow delay cells used to set a positive edge of a pulse through the ring oscillator and fast delay cells to set a negative edge of the pulse through the ring oscillator, wherein the pulse width narrows over time; and
wherein the circuitry includes another delay line which sets the initial pulse width going into the ring oscillator.
11. The digital modulator of claim 10 , wherein the delay in another delay line is adjustable.
12. A ring oscillator including:
slow delay cells used to set a positive edge of a pulse through the ring oscillator and fast delay cells to set a negative edge of the pulse through the ring oscillator, wherein the pulse width narrows over time; and
further comprising an end-of-race detector that detects the end of a period and outputs a clk signal.
13. The ring oscillator of claim 12 further including SR latches connected to the fast and slow delay cells.
14. The ring oscillator of claim 12 , wherein the speed of the pulse narrowing in the ring oscillator is adjustable to adjust the period.
15. The ring oscillator of claim 12 , wherein the delay of at least one of the slow delay or fast delay cells is adjustable to adjust the period.
16. The ring oscillator of claim 12 , wherein the delay of the slow delay cells is adjustable to adjust the period.
17. A ring oscillator including:
slow delay cells used to set a positive edge of a pulse through the ring oscillator and fast delay cells to set a negative edge of the pulse through the ring oscillator, wherein the pulse width narrows over time; and
wherein another delay line sets the initial pulse width going into the ring oscillator.
18. A method of digitally producing a modulated signal comprising:
setting the time on of an output signal using a delay line;
setting the period of the output signal using a ring oscillator with slow delay cells to used to set a positive edge of a pulse through the ring oscillator and fast delay cells to set a negative edge of the pulse through the ring oscillator, wherein the pulse width narrows over time;
detecting an end of the period using an end-of-race detector; and
outputting a clock signal.