Method for pulse width modulation synchronization in a parallel UPS system
View Patent ↗A method for pulse width modulated pulse synchronization in a parallel UPS system uses the locally measured critical bus voltage to detect a zero crossing and adjust the PWM pulse to coincide with the zero crossing. No communication between the units is required to perform synchronization, and no “master” and “slave” relationship exists to thereby increase the total system reliability.
1. A method for pulse width modulated (PWM) pulse synchronization in a parallel power supply system comprising:
providing at least first and second power supplies connected in parallel, wherein each power supply is connected to a common output bus voltage having a zero voltage crossing, a control update point for each of a plurality of PWM pulses and a cycle period;
measuring a time period between the zero voltage crossing and the control update point for one of the PWM pulses; and
adjusting the control update points according to the measured time period, such that the PWM pulses coincide with the zero voltage crossing.
2. The method of claim 1 , wherein the at least first and second power supplies are uninterruptible power supply units (UPS).
3. The method of claim 1 further comprising adjusting a sample rate to a fixed number of PWM pulses in one cycle period of the bus voltage.
4. The method of claim 1 further comprising:
sampling the bus voltage at a predetermined sample rate;
determining a frequency of the bus voltage; and
adjusting the sample rate to a fixed number of PWM pulses in one cycle period of the bus voltage.
5. The method of claim 4 in which the frequency of the bus voltage is determined from measurement of time between consecutive zero crosses of the output voltage.
6. The method of claim 4 in which the frequency of the bus voltage is determined from an internally generated voltage reference derived from a voltage fed commonly to all UPS units.
7. The method of claim 1 in which the zero voltage crossing of the bus voltage is detected by each controller from an internally generated voltage reference derived from a voltage fed commonly to all UPS units.
8. The method of claim 1 in which adjusting the control update points to coincide with the detected zero voltage crossing includes continuously adjusting a PWM pulse frequency based on a phase error and a frequency error.
9. The method of claim 8 , whereby the rate of change of the adjustment is limited to provide a gradual change of the PWM frequency over time.
10. A system for pulse width modulated (PWM) pulse synchronization, comprising:
at least first and second power supplies connected in parallel, wherein each power supply is connected to a common output bus voltage having a zero voltage crossing, a control update point for each of a plurality of PWM pulses and a cycle period; and
at least first and second processors configured to control the first and second power supplies, respectively, wherein the processors are each configured to measure a time period between the zero voltage crossing and the control update point for one of the PWM pulses, and wherein the processors are further configured to adjust the control update points according to the measured time period, such that the PWM pulses from both the first and second power supplies coincide with the zero voltage crossing.
11. The system of claim 10 , wherein the at least first and second power supplies are uninterruptible power supply units (UPS).
12. The system of claim 10 , wherein the control update points are adjusted with a limited a rate of change to provide a gradual change of the PWM frequency over time.
13. A method for pulse width modulated (PWM) pulse synchronization in a parallel power supply system comprising:
providing at least first and second power supplies connected in parallel, wherein each power supply is connected to a common output bus voltage having a zero voltage crossing and a cycle period, each power supply providing a plurality of PWM pulses with a control update point for each PWM pulse;
measuring a time difference and a phase difference between the zero voltage crossing and the control update point for one of the PWM pulses; and
adjusting the control update points according to the measured time difference and phase difference, such that the PWM pulses coincide with the zero voltage crossing.
14. The method of claim 13 further comprising:
sampling the bus voltage at a predetermined sample rate;
determining a frequency of the bus voltage; and
adjusting the sample rate to a fixed number of PWM pulses in one cycle period of the bus voltage.
15. The method of claim 14 wherein the output bus voltage is sampled at each control update point during each PWM pulse.
16. The method of claim 14 wherein adjusting the control update points such that the PWM pulses coincide with the zero voltage crossing including adjusting the sample rate.
17. The method of claim 13 wherein each PWM pulse is centered on each control update point.
18. The method of claim 13 wherein the control update points are adjusted with a limited a rate of change to provide a gradual change of the PWM frequency over time.
19. The method of claim 13 wherein a first processor of the first power supply and a second processor of the second power supply independently measures the time and phase difference for the PWM pulses generated by the respective power supplies.
20. The method of claim 13 wherein synchronization of the PWM pulses does not require any additional communication between the first and second power supplies, and wherein synchronization of the PWM pulses does not require any additional wiring between the first and second power supplies, rather both the first and second power supplies rely on locally measured time and phase differences to synchronize the PWM pulses.