High voltage shunt-regulator circuit with voltage-dependent resistor
View Patent ↗A voltage regulator circuit comprising a first circuit functioning as a voltage dependent resistor, the first circuit having an input coupled to a voltage source and an output and having a resistance dependent on the voltage applied across the circuit by the voltage source such that the resistance increases as the applied voltage increases; and a regulator coupled to the output of the first circuit for providing a regulated output voltage.
1. A voltage regulator circuit comprising:
a first circuit functioning as a voltage dependent resistor, the first circuit having an input coupled to a voltage source and an output and having a first circuit resistance dependent on an applied voltage applied across the first circuit by the voltage source such that the first circuit resistance increases as the applied voltage increases; and
a regulator coupled to the output of the first circuit for providing a regulated output voltage;
the first circuit comprising a MOS transistor and a series JFET, wherein the voltage source is connected to both the MOS transistor and the series JFET at a single node, and wherein the series JFET has its main terminals connected in series with main terminals of the MOS transistor.
2. The voltage regulator circuit of claim 1 , wherein the first circuit resistance increases at an increasing rate as the applied voltage increases, thereby causing a first circuit current through the first circuit to saturate.
3. The voltage regulator circuit of claim 2 , wherein the first circuit comprises the MOS transistor and the series JFET functioning as the voltage dependent resistor, the series JFET having a conduction channel that pinches off with increasing voltage of the voltage source such that a channel of the series JFET will saturate at a certain applied voltage.
4. The voltage regulator circuit of claim 3 , wherein the series JFET is an internal JFET of the MOS transistor.
5. The voltage regulator circuit of claim 4 , wherein the MOS transistor is a PMOS transistor and the series JFET is a P-JFET.
6. The voltage regulator circuit of claim 3 , wherein the output of the first circuit comprises a main terminal of said series JFET, said main terminal of said JFET being coupled to said regulator.
7. The voltage regulator circuit of claim 1 , wherein said MOS transistor has a gate coupled to a biasing circuit for biasing the MOS transistor in a triode region of operation.
8. The voltage regulator circuit of claim 7 , wherein the biasing circuit comprises at least one zener diode.
9. The voltage regulator circuit of claim 8 , wherein the biasing circuit comprises a current source circuit coupled to said at least one zener diode for providing a biasing current to said gate of said MOS transistor.
10. The voltage regulator circuit of claim 9 , wherein said current source circuit comprises a current mirror circuit defining a reference current in a further resistance disposed between the voltage source and the current mirror circuit.
11. The voltage regulator circuit of claim 10 , wherein said further resistance comprises a first resistance and a second resistance.
12. The voltage regulator circuit of claim 11 , further comprising a further zener diode in series with said first and second resistances.
13. The voltage regulator circuit of claim 10 , wherein said at least one zener diode is in parallel connection with said further resistance in series with said current mirror circuit.
14. The voltage regulator circuit of claim 9 , wherein said at least one zener diode comprises a stack of series-connected zener diodes.
15. The voltage regulator circuit of claim 1 , wherein said regulator comprises a shunt regulator.
16. The voltage regulator circuit of claim 1 , wherein a substrate of the MOS transistor is coupled to the voltage source, a gate of the series JFET being coupled to the substrate.
17. The voltage regulator circuit of claim 1 , wherein the series JFET has a gate coupled to the voltage source, and wherein the MOS transistor is connected in series with a core resistance.
18. A voltage regulator circuit comprising:
a first circuit functioning as a voltage dependent resistor, the first circuit having an input coupled to a voltage source and an output and having a first circuit resistance dependent on an applied voltage applied across the first circuit by the voltage source such that the first circuit resistance increases as the applied voltage increases; and
a regulator coupled to the output of the first circuit for providing a regulated output voltage;
the first circuit comprising a MOS transistor and a series JFET functioning as the voltage dependent resistor, wherein the series JFET is an internal JFET of the MOS transistor.
19. A voltage regulator circuit comprising:
a first circuit functioning as a voltage dependent resistor, the first circuit having an input coupled to a voltage source and an output and having a first circuit resistance dependent on an applied voltage applied across the first circuit by the voltage source such that the first circuit resistance increases as the applied voltage increases; and
a regulator coupled to the output of the first circuit for providing a regulated output voltage;
the first circuit comprising a MOS transistor and a series JFET functioning as the voltage dependent resistor, wherein said MOS transistor has a gate coupled to a biasing circuit for biasing the MOS transistor in a triode region of operation.