Organic light-emitting display panel and method of manufacturing the same

1. An organic light-emitting display panel comprising:

a gate line and a data line formed to cross each other on a substrate;

an organic light-emitting diode formed in a pixel area defined by the intersection of the gate line and the data line;

a power line formed parallel to the data line for supplying an electric current to the organic light-emitting diode;

a switching transistor provided at the intersection of the gate line and the data line;

a driving transistor connected to the switching transistor and the power line to control the current supplied from the power line; and

a storage capacitor composed of a storage electrode overlapping the power line with a first gate-insulating layer disposed therebetween,

wherein the storage capacitor includes a groove portion formed on a lateral side of the power line overlapping the storage electrode so that the overlapping area of the power line and the storage electrode is kept constant.

2. The organic light-emitting display panel of claim 1 , wherein the groove portion is formed on a lateral side adjacent to the data line.

3. The organic light-emitting display panel of claim 2 , wherein the groove portion has a length at least equal to or greater than a length between the top and bottom of the storage electrode.

4. The organic light-emitting display panel of claim 3 , wherein the storage electrode has a width greater than that of an overlapping area of the storage electrode and the power line.

5. The organic light-emitting display panel of claim 2 , further comprising an auxiliary storage electrode extending from the storage electrode to overlap the power line.

6. The organic light-emitting display panel of claim 5 , wherein the auxiliary storage electrode has a width smaller or larger than that of the power line.

7. The organic light-emitting display panel of claim 1 , wherein the driving transistor comprises:

a first semiconductor pattern formed of polysilicon on the substrate;

a first source electrode formed on the first semiconductor pattern and connected to the power line;

a first drain electrode formed on the first semiconductor pattern to face the first source electrode and connected to the organic light-emitting diode;

a second gate-insulating layer formed on the first source electrode and the first drain electrode; and

a first gate electrode formed on the second gate-insulating layer to overlap the first semiconductor pattern.

8. The organic light-emitting display panel of claim 7 , wherein the first gate electrode is electrically connected to the storage electrode.

9. The organic light-emitting display panel of claim 1 , wherein the switching transistor comprises:

a second gate electrode formed on the first gate-insulating layer;

the second gate-insulating layer formed on the second gate electrode;

a second semiconductor pattern formed of amorphous silicon on the substrate; and

a second source electrode and a second drain electrode formed on the second semiconductor pattern to face each other.

10. The organic light-emitting display panel of claim 9 , further comprising a bridge electrode connecting the first gate electrode to the second drain electrode.

11. A method of manufacturing an organic light-emitting display panel, the method comprising:

forming a gate line and a data line on a substrate, the gate line and the data line crossing each other with a gate-insulating layer disposed therebetween;

forming an organic light-emitting diode in a pixel area defined by the intersection of the gate line and the data line;

forming a switching transistor at the intersection of the gate line and the data line;

forming a driving transistor connected to the switching transistor;

forming a power line parallel to the data line; and

forming a storage electrode overlapping the power line with the gate-insulating layer disposed therebetween to form a storage capacitor and including a projecting portion with respect to a lateral side of the power line wherein forming the power line parallel to the data line further comprises forming a groove portion on a lateral side adjacent to the data line in an overlapping area of the storage electrode and the power line.

12. The method of claim 11 , wherein forming the groove further comprises forming the groove portion to have a length at least equal to or greater than a length between the top and bottom of the storage electrode.

13. The method of claim 11 , wherein forming the storage electrode further comprises forming an auxiliary storage electrode extending from the storage electrode to overlap the power line.

14. The method of claim 13 , wherein forming the auxiliary storage electrode further comprises forming the auxiliary storage electrode to have a width smaller or larger than that of the power line.

15. The method of claim 11 , wherein forming the switching transistor and the driving transistor comprises:

forming a first semiconductor pattern with polysilicon on the substrate and a first gate-insulating layer;

forming a source electrode on the first semiconductor pattern and connected to the power line, and a first drain electrode facing the first source electrode;

forming a second gate-insulating layer on the first source electrode and the first drain electrode;

forming a first gate electrode on the second gate-insulating layer to overlap the first semiconductor pattern, and a second gate electrode simultaneously with the first gate electrode; and

forming a third gate-insulating layer, a second semiconductor pattern, a second source electrode, and a second drain electrode.