IP Library Granted Patent US 8,307,180
Granted Patent B2
US 8,307,180 · App. 12/039,672 · Granted Nov 6, 2012

Extended utilization area for a memory device

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Quick Facts
Patent No.
US 8,307,180
App. No.
12/039,672
Granted
Nov 6, 2012
Kind
B2
Abstract

Methods, systems and devices for configuring access to a memory device are disclosed. The configuration of the memory device may be carried out by creating a plurality of access profiles that are adapted to optimize access to the memory device in accordance with the type of access. Accordingly, when an application with specific memory access needs is initiated, the memory access profile that is most optimized for that particular access need is utilized to configure access to the memory device. The configuration may be effected for a portion of the memory device, a partition of the memory device, or even one single access location on the memory device.

Claims (48)

1. A method for configuring access to a memory device, comprising:

receiving one or more commands related to at least one usage of said memory device, said one or more commands for activating one or more predefined access profiles associated with said memory device, said predefined access profiles being effective for determining how access to said memory device is configured for said at least one usage; and

configuring access to said memory device in accordance with at least one of said access profiles so that said memory device is effective for said at least one usage.

2. The method of claim 1 , wherein said one or more access profiles correspond to at least one of a random and a sequential mode of access.

3. The method of claim 2 , wherein said access profiles correspond to at least one of a read, a write, an erase, and a modify attribute operation.

4. The method of claim 1 , wherein said one or more access profiles are adapted to accommodate repeated access requests to an identical address of said memory device.

5. The method of claim 1 , wherein said one or more access profiles are adapted to produce an optimized performance associated with said memory device.

6. The method of claim 5 , wherein said performance is optimized in accordance with at least one of: data throughput, lifetime, and power consumption associated with said memory device.

7. The method of claim 1 , wherein said one or more commands comprise a metadata portion for designating a preferred access profile corresponding to said command.

8. The method of claim 7 , wherein a specific memory location is utilized in accordance with said access profile.

9. The method of claim 8 , wherein said specific memory location comprises a section of said memory device with special characteristics.

10. The method of claim 8 , wherein said specific memory location comprises a separate physical memory chip.

11. The method of claim 1 , wherein said one or more access profiles are associated with one or more partitions of said memory device.

12. The method of claim 1 , wherein said configuring is adapted in parallel for two or more access profiles.

13. The method of claim 12 , wherein said configuring is carried out in accordance with Joint Electron Devices Engineering Council Standard (JESD84) standard for embedded Multimedia Card (eMMC).

14. The method of claim 12 , further comprising designating access priority levels to resolve simultaneous access conflicts to memory resources.

15. The method of claim 1 , wherein said memory device is used to effect both mass memory and system memory implementations.

16. The method of claim 1 , further comprising a default access profile that is used to configure said memory device upon power up.

17. A memory device, comprising:

one or more registers for storing one or more predefined access profiles associated with said memory device, said predefined access profiles being effective for determining how access to said memory device is configured for at least one usage;

a controller for receiving one or more commands related to said at least one usage of said memory device, said one or more commands for activating said one or more predefined access profiles associated with said memory device, said controller also

for configuring access to said memory device in accordance with at least one of said predefined access profiles so that said memory device is effective for said at least one usage.

18. The memory device of claim 17 , wherein said one or more access profiles correspond to at least one of a random and a sequential mode of access.

19. The memory device of claim 18 , wherein said access profiles correspond to at least one of a read, a write, an erase, and a modify attribute operation.

20. The memory device of claim 17 , wherein said one or more access profiles are adapted to accommodate repeated access requests to an identical address of said memory device.

21. The memory device of claim 17 , wherein said one or more access profiles are adapted to produce an optimized performance associated with said memory device.

22. The memory device of claim 21 , wherein said performance is optimized in accordance with at least one of: data throughput, lifetime, and power consumption associated with said memory device.

23. The memory device of claim 17 , wherein said one or more commands comprise a metadata portion for designating a preferred access profile corresponding to said command.

24. The memory device of claim 23 , wherein a specific memory location is utilized in accordance with said access profile.

25. The memory device of claim 24 , wherein said specific memory location comprises a section of said memory device with special characteristics.

26. The memory device of claim 24 , wherein said specific memory location comprises a separate physical memory chip.

27. The memory device of claim 17 , wherein said one or more access profiles are associated with one or more partitions of said memory device.

28. The memory device of claim 17 , wherein said configuring is adapted in parallel for two or more access profiles.

29. The memory device of claim 28 , wherein said configuring is carried out in accordance with Joint Electron Devices Engineering Council Standard (JESD84) standard for embedded Multimedia Card (eMMC).

30. The memory device of claim 28 , further comprising means for designating access priority levels to resolve simultaneous access conflict to memory resources.

31. The memory device of claim 17 , wherein said memory device is used to effect both mass memory and system memory implementations.

32. The memory device of claim 17 , further comprising a default access profile that is used to configure said memory device upon power up.

33. The memory device of claim 17 , wherein one or more of said predefined access profiles are updated with a new version of said access profile.

34. The memory device of claim 17 , wherein a currently active access profile resides in a designated memory register.

35. A computer program product embodied on a non-transitory computer-readable medium, comprising:

a computer code for receiving one or more commands related to at least one usage of a memory device, said one or more commands for activating one or more predefined access profiles associated with said memory device, said predefined access profiles being effective for determining how access to said memory device is configured for said at least one usage; and

a computer code for configuring access to said memory device in accordance with at least one of said access profiles so that said memory device is effective for said at least one usage.

36. A system for accessing a memory device, comprising:

a controller for receiving one or more commands related to at least one usage of said memory device, said one or more commands for activating one or more predefined access profiles associated with said memory device, said predefined access profiles being effective for determining how access to said memory device is configured for said at least one usage, said controller also for

configuring access to said memory device in accordance with at least one of said access profiles so that said memory device is effective for said at least one usage.

37. A system for accessing a memory device, comprising:

a host for issuing one or more commands related to at least one usage of a memory device, said one or more commands being issued in accordance with at least one or more predefined access profiles for said memory device, said predefined access profiles being effective for determining how access to said memory device is configured for said at least one usage; and

a controller for receiving said commands and configuring access to said memory device in accordance with said at least one or more access profiles so that said memory device is effective for said at least one usage.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 10, 2013
From: NOKIA CORPORATION
To: NOKIA INC.
Reel/Frame 030189/0381 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 10, 2013
From: NOKIA INC.
To: MEMORY TECHNOLOGIES LLC
Reel/Frame 030190/0043 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 12, 2008
From: HYVONEN, JANI; MYLLY, KIMMO; HAKKINEN, JUSSI; GYL, YEVGEN
To: NOKIA CORPORATION
Reel/Frame 020937/0331 →