IP Library Granted Patent US 7,714,417
Granted Patent B2
US 7,714,417 · App. 12/042,360 · Granted May 11, 2010

Substrate for mounting semiconductor element and method of manufacturing the same

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Quick Facts
Patent No.
US 7,714,417
App. No.
12/042,360
Granted
May 11, 2010
Kind
B2
Abstract

The present invention provides a semiconductor element mounting substrate 101 including: a base substrate 1 having a region 2 for mounting a semiconductor element 11 , the region 2 being set on the major surface of the base substrate 1 ; a plurality of wiring patterns 3 formed on the base substrate 1 and connected to the semiconductor element 11 ; and a dummy pattern 8 formed like a frame in the region 2 for mounting the semiconductor element 11 and not connected to the wiring patterns 3.

Claims (24)

1. A substrate for mounting a semiconductor element, comprising:

a base substrate having a region for mounting the semiconductor element, the region being set on a major surface of the base substrate;

a plurality of wiring patterns formed on the base substrate and connected to the semiconductor element; and

a dummy pattern formed like a frame in the region for mounting the semiconductor element and not connected to the wiring patterns;

the semiconductor element connected to the dummy pattern without an adhesive; and

the semiconductor element fixed on the base substrate with an adhesive.

2. The substrate for mounting a semiconductor element according to claim 1 , wherein the dummy pattern is made of the same conductor material as the wiring patterns and is insulated from the wiring patterns.

3. The substrate for mounting a semiconductor element according to claim 1 , wherein the dummy pattern is made of an insulating material.

4. The substrate for mounting a semiconductor element according to claim 1 , wherein the dummy pattern has a larger thickness than the wiring pattern.

5. The substrate for mounting a semiconductor element according to claim 1 , wherein a plurality of dummy patterns are formed inward and outward from each other.

6. The substrate for mounting a semiconductor element according to claim 5 , wherein the inner dummy pattern has a larger thickness than the outer dummy pattern.

7. A substrate for mounting a semiconductor element, comprising:

a base substrate having a region for mounting a semiconductor element, the region being set on a major surface of the base substrate;

a plurality of wiring patterns formed on the base substrate for connection to a semiconductor element;

a frame-like dummy pattern formed in the region for mounting a semiconductor element and not connected to the wiring patterns;

a semiconductor element connected to the dummy pattern and to the wiring patterns; and

an adhesive in the volume surrounded by the semiconductor element, the dummy pattern and the base substrate.

8. A substrate for mounting a semiconductor element, comprising:

a base substrate having a region for mounting a semiconductor element, the region being on a major surface of the base substrate;

a plurality of wiring patterns formed on the base substrate for connection to a semiconductor element;

a frame-like dummy pattern in the region for mounting a semiconductor element and not connected to the wiring patterns;

a semiconductor element connected to the dummy pattern and to the wiring patterns;

the semiconductor element fixed on the base substrate with an adhesive; and

a thickness of the adhesive is less than a thickness of the dummy pattern.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 3, 2014
From: PANASONIC CORPORATION (FORMERLY MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.)
To: GODO KAISHA IP BRIDGE 1
Reel/Frame 032152/0514 →
CHANGE OF NAME Recorded Nov 21, 2008
From: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
To: PANASONIC CORPORATION
Reel/Frame 021897/0606 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 5, 2008
From: NONOYAMA, SHIGERU
To: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
Reel/Frame 021053/0251 →