IP Library Granted Patent US 8,213,542
Granted Patent B2
US 8,213,542 · App. 12/044,814 · Granted Jul 3, 2012

Highly optimized digital IQ transmitter chain

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Quick Facts
Patent No.
US 8,213,542
App. No.
12/044,814
Granted
Jul 3, 2012
Kind
B2
Abstract

Circuitry separates a modulation signal into digital sign and magnitude signal components. The digital magnitude signal is converted to an analog magnitude signal. The analog magnitude signal is the mixed with an in-phase or quadrature carrier signal under the influence of the digital sign signal and routed to a driver output stage.

Claims (12)

1. An electronic circuit, comprising:

a digital-to-analog converter, the digital-to-analog converter configured to convert a digital magnitude signal derived from a digital modulation signal into an analog magnitude signal responsive to a multi-state switching signal;

a mixer, the mixer coupled to receive signals from the digital-to-analog converter and the mixer configured to mix at least a digital sign signal derived from the digital modulation signal with the analog magnitude signal, responsive to an in-phase-and-quadrature (IQ) differential signal to produce a mixed signal that is provided to a pair of output nodes; and

a multiplexer configured to receive the digital magnitude signal and an inverted form of the digital sign signal and a logic reference signal and derive the multi-state switching signal there from.

2. The electronic circuit according to claim 1 , wherein the IQ differential signal is defined by a difference between an analog in-phase carrier signal and an analog quadrature carrier signal.

3. The electronic circuit according to claim 1 , wherein the digital-to-analog converter is a first digital-to-analog converter, the multi-state switching signal is a first multi-state switching signal, the mixer is a first mixer, and the mixed signal is a first mixed signal, the electronic circuit further comprising:

a second digital-to-analog converter configured to convert the digital magnitude signal into a second analog magnitude signal responsive to a second multi-state switching signal and the in-phase-and-quadrature (IQ) differential signal; and

a second mixer coupled to receive signals from the second digital-to-analog converter and to mix at least an inverted form of the digital sign signal with the second analog magnitude signal to provide a second mixed signal by way of the pair of output nodes.

4. The electronic circuit according to claim 3 , further comprising a multiplexer configured to receive the digital magnitude signal and the digital sign signal and a logic reference signal and derive the second multi-state switching signal there from.

5. An electronic circuit, comprising:

a digital-to-analog converter, the digital-to-analog converter configured to convert a digital magnitude signal derived from a digital modulation signal into an analog magnitude signal responsive to a multi-state switching signal; and

a mixer coupled to receive signals from the digital-to-analog converter and configured to mix a digital sign signal and an inverted form of the digital sign signal derived from the digital modulation signal with the analog magnitude signal responsive to an in-phase-and-quadrature (IQ) differential signal to produce a mixed signal that is provided by way of a pair of output nodes, the IQ differential signal being defined by a difference between an analog in-phase carrier signal and an analog quadrature carrier signal and the multi-state switching signal corresponding to the digital magnitude signal.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 17, 2020
From: INTEL CORPORATION
To: APPLE INC.
Reel/Frame 053518/0586 →
CONFIRMATORY ASSIGNMENT EFFECTIVE AS OF JANUARY 1, 2018 Recorded Aug 12, 2020
From: INTEL DEUTSCHLAND GMBH
To: INTEL CORPORATION
Reel/Frame 053477/0001 →
CHANGE OF NAME Recorded Nov 6, 2015
From: INTEL MOBILE COMMUNICATIONS GMBH
To: INTEL DEUTSCHLAND GMBH
Reel/Frame 037057/0061 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 19, 2012
From: INTEL MOBILE COMMUNICATIONS TECHNOLOGY GMBH
To: INTEL MOBILE COMMUNICATIONS GMBH
Reel/Frame 027556/0709 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 18, 2012
From: INFINEON TECHNOLOGIES AG
To: INTEL MOBILE COMMUNICATIONS TECHNOLOGY GMBH
Reel/Frame 027548/0623 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 13, 2008
From: VAN WAASEN, STEFAN
To: INFINEON TECHNOLOGIES AG
Reel/Frame 020657/0564 →