Thin film transistor, method of fabricating the same, and organic light emitting diode display device including the same
View Patent ↗A thin film transistor includes: a substrate; a semiconductor layer disposed on the substrate, and including a channel region, source and drain regions, and edge regions having a first impurity formed at edges of the source and drain regions, and optionally, in the channel region; a gate insulating layer insulating the semiconductor layer; a gate electrode insulated from the semiconductor layer by the gate insulating layer; and source and drain electrodes electrically connected to the semiconductor layer.
1. A thin film transistor, comprising:
a substrate;
a semiconductor layer disposed on the substrate, and comprising a crystallization inducing metal, a channel region, source and drain regions respectively disposed on opposing first and second sides of the channel region, and edge regions that are doped with a first impurity and that extend continuously from the source region to the drain region, along opposing third and fourth sides of the channel region, and excluding center portions of the channel region, source region and drain region;
a gate insulating layer insulating the semiconductor layer;
a gate electrode insulated from the semiconductor layer by the gate insulating layer; and
source and drain electrodes electrically connected to the semiconductor layer,
wherein a first interconnection is formed through a first contact hole exposing the source region and a portion of the edge regions at edges of the source region,
wherein a second interconnection is formed through a second contact hole exposing the drain region and a portion of the edge regions at edges of the drain region, and
wherein the first impurity is doped at a dose of 1*e 11 /cm 3 to 3*e 15 /cm 3 to getter the crystallization inducing metal into the edge regions of the semiconductor layer.
2. The thin film transistor according to claim 1 , wherein the first impurity comprises phosphorous (P).
3. The thin film transistor according to claim 1 , wherein the first interconnection is the source electrode and the second interconnection is the drain electrode.
4. The thin film transistor according to claim 1 , wherein the crystallization inducing metal comprises at least one selected from the group consisting of Ni, Pd, Ti, Ag, Au, Al, Sn, Sb, Cu, Co, Mo, Tr, Ru, Rh, Cd and Pt.
5. The thin film transistor according to claim 1 , wherein the concentration of the crystallization inducing metal in the channel region of the semiconductor layer is less than 1*e 16 /cm 3 .
6. An organic light emitting diode (OLED) display device, comprising:
a substrate;
a semiconductor layer disposed on the substrate, and comprising a crystallization inducing metal, a channel region, source and drain regions respectively disposed on opposing first and second sides of the channel, and edge regions that are doped with a first impurity and that extend continuously from the source region to the drain region, along opposing third and fourth sides of the channel region, and excluding center portions of the channel region, source region and drain region;
a gate insulating layer insulating the semiconductor layer;
a gate electrode insulated from the semiconductor layer by the gate insulating layer;
source and drain electrodes electrically connected to the semiconductor layer;
a first electrode electrically connected to one of the source and drain electrodes; and
an organic layer and a second electrode disposed on the first electrode,
wherein a first interconnection is formed through a first contact hole exposing the source region and a portion of the edge regions at edges of the source region,
wherein a second interconnection is formed through a second contact hole exposing the drain region and a portion of the edge regions at edges of the drain region, and
wherein the first impurity is doped at a dose of 1*e 11 cm 3 to 3*e 15 /cm 3 to getter the crystallization inducing metal into the edge regions of the semiconductor layer.
7. The OLED display device according to claim 6 , wherein the first impurity comprises phosphorous (P).
8. The OLED display device according to claim 6 , wherein the first interconnection is the source electrode and the second interconnection is the drain electrode.
9. The OLED display device according to claim 6 , wherein the concentration of the crystallization inducing metal in the channel region of the semiconductor layer is less than 1*e 16 /cm 3 .