IP Library Granted Patent US 7,982,468
Granted Patent B2
US 7,982,468 · App. 12/048,133 · Granted Jul 19, 2011

Apparatus and method for testing electrical interconnects with switches

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Quick Facts
Patent No.
US 7,982,468
App. No.
12/048,133
Granted
Jul 19, 2011
Kind
B2
Abstract

A test system including a package with switchable paths. The package may have conductive paths that are selected by switches. The electrically switchable conductive paths may yield increased data without significantly increasing the required testing hardware.

Claims (30)

1. A test system comprising:

a printed circuit board defining a first plurality of conductive paths, each of the first plurality of conductive paths associated with a respective first group of connection points;

a package defining a second plurality of conductive paths, each of the plurality of second conductive paths associated with a respective second group of connection points and comprising a switch;

an interposer located between the printed circuit board and the package comprising a first side, second side, and a plurality of interface connections, the first side interconnecting first corresponding individual connection points of the first group of connection points via first interface points, the second side interconnecting second corresponding individual connection points of the second group of connection points via second interface points; and

wherein each of the plurality of switches is associated with a corresponding interface connection of the plurality of interface connections such that an electrical signal may be provided along a selected conduction path, the selected conduction path connecting one of the first plurality of conductive paths through at least two of the plurality of interface connections to one of the second plurality of conductive paths; wherein at least one switch of the plurality of switches is activated to define the selected conduction path.

2. The test system of claim 1 further comprising test equipment configured to apply a first predefined electrical signal to at least one of the first plurality of conductive paths and to apply a second predefined electrical signal to at least one of the second plurality of conductive paths, the first and second predefined electrical signals sufficient to activate the at least one switch of the plurality of switches.

3. The test system of claim 2 further comprising an electrical measurement corresponding to at least one interface connection of the plurality of interface connections.

4. The test system of claim 3 wherein the electrical measurement identifies a fault corresponding to at least one interface connection of the plurality of interface connections.

5. The test system of claim 3 wherein the electrical measurement measures a reliability of at least one interface connection of the plurality of interface connections.

6. The test system of claim 1 further comprising at least M+N test nodes, wherein at least M×N electrical paths may be measured using the M+N test nodes, further wherein each electrical path includes at least one interface connection of the plurality of interface connections.

7. The test system of claim 1 wherein the plurality of switches are each a diode having an anode and a cathode.

8. The test system of claim 7 wherein:

each of the first plurality of the conductive paths are associated with a cathode of a subset of the plurality of diodes, the subset being associated with a respective connection point of the respective first group of connection points; and

each of the second plurality of conductive paths are associated with an anode of a second subset of the plurality of diodes, the second subset being associated with respective connection point of the respective second group of connection points.

9. The test system of claim 8 further comprising:

a test head configured to apply a first predefined voltage to at least one of the first plurality of conductive paths and to apply a second predefined voltage to at least one of the second plurality of conductive paths, the predefined voltages sufficient to forward bias at least one of the plurality of diodes.

10. The test system of claim 9 wherein the predefined voltages are sufficient to forward bias one of the plurality of diodes, and not forward bias the remaining plurality of diodes.

11. A test method comprising:

providing a printed circuit board defining a first plurality of conductive paths, each of the plurality of conductive paths associated with a respective first group of connection points;

providing a package defining a second plurality of conductive paths, each of the plurality of conductive paths associated a respective second group of connection points and comprising a switch;

providing an interposer between the printed circuit board and the package comprising a plurality of interface connections interconnecting individual connection points of the first group of connection points to individual connection points of the second group of connection points;

wherein each of the plurality of switches is associated with a corresponding interface connection such that an electrical signal may be provided between one of the first plurality of conductive paths through a respective interface connection to one of the second plurality of conductive paths;

applying a first electrical signal to at least one of the first plurality of conductive paths; and

applying a second electrical signal to at least one of the second plurality of conductive paths, wherein the first and second electrical signals sufficient to activate at least one of the plurality of switches to define a particular individual conductive path such that there is electrical continuity between at least one of the first plurality of conductive paths, at least two of the plurality of interface connections, and one of the second plurality of second conductive paths.

12. The test method of claim 11 further comprising obtaining an electrical characteristic of the at least one interconnection interface associated with the at least one activated switch.

13. The test method of claim 12 further comprising isolating a fault to at least one interface connection.

14. The test method of claim 12 further comprising characterizing the fault of at least one interface connection.

15. The test method of claim 12 further comprising measuring a reliability of at least one interface connection.

16. The test method of claim 11 wherein the plurality of switches are each a diode having an anode and a cathode.

17. The test method of claim 11 further comprising measuring M×N test paths, using M+N test nodes to electrically contact the conductive paths.

Assignments (2)
MERGER AND CHANGE OF NAME Recorded Dec 16, 2015
From: ORACLE USA, INC.; SUN MICROSYSTEMS, INC.; ORACLE AMERICA, INC.
To: ORACLE AMERICA, INC.
Reel/Frame 037311/0101 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 13, 2008
From: VACAR, DAN; MCELFRESH, DAVID K.; MELANSON, ROBERT H.; LOPEZ, LEONCIO D.
To: SUN MICROSYSTEMS, INC.
Reel/Frame 020649/0323 →