Method and system for using PSK sync word for fine tuning frequency adjustment
View Patent ↗In RF transceivers, a method and system for using phase shift key (PSK) sync word for fine tuning frequency adjustment are provided. One aspect of the invention provides for adjusting a local oscillator frequency in a radio frequency (RF) receiver when a residual DC offset remains after a coarse frequency offset adjustment if performed. The fine adjustment may be necessary because of the synchronization required with a PSK-based modulated portion of a Bluetooth packet. A residual phase shift detected in a sync sequence portion of the Bluetooth packet may be utilized to determine a residual or fine frequency adjustment. This approach may allow an RF receiver to operate, in some instances, without the need for an equalizer. In this regard, the power consumed by the RF receiver may be minimized and/or the overall cost of the RF receiver may be reduced.
1. A method for signal processing, the method comprising:
in a Bluetooth receiver, determining whether a DC offset remains after a coarse frequency adjustment of a local oscillator is performed during a header portion of a received Bluetooth packet; and
if said DC offset remains, correcting said DC offset during a sync sequence portion of said received Bluetooth packet.
2. The method according to claim 1 , comprising generating a DC offset estimate of at least a portion of said received Bluetooth packet.
3. The method according to claim 2 , comprising monitoring said DC offset estimate to determine whether said DC offset estimate is outside a threshold value range.
4. The method according to claim 1 , comprising estimating said coarse frequency adjustment for a receiver frequency during a frequency shift key (FSK) portion of said Bluetooth packet.
5. The method according to claim 4 , comprising generating a fine frequency adjustment by determining a phase difference between a last symbol and a sixth symbol of said sync sequence portion of said Bluetooth packet, after said coarse frequency adjustment.
6. The method according to claim 5 , comprising generating said fine frequency adjustment based on a sampling instant estimate.
7. The method according to claim 6 , comprising determining said sampling instant estimate by correlating contents of said sync sequence portion with expected contents of said sync sequence portion.
8. The method according to claim 7 , comprising correlating said contents of said sync sequence portion after said adjustment of said receiver frequency based on said coarse frequency adjustment.
9. A system for signal processing, the system comprising:
one or more circuits, in a Bluetooth receiver, wherein said one or more circuits are operable to determine whether a DC offset remains after a coarse frequency adjustment of a local oscillator is performed during a header portion of said received Bluetooth packet; and
said one or more circuits operable to correct said DC offset during a sync sequence portion of received Bluetooth packet, if said DC offset remains.
10. The system according to claim 9 , wherein said one or more circuits are operable to generate a DC offset estimate of at least a portion of said received Bluetooth packet.
11. The system according to claim 10 , wherein said one or more circuits are operable to monitor said DC offset estimate to determine if said DC offset estimate is outside a threshold value range.
12. The system according to claim 9 , wherein said one or more circuits are operable to estimate said coarse frequency adjustment for a receiver frequency during a frequency shift key (FSK) portion of said Bluetooth packet.
13. The system according to claim 12 , wherein said one or more circuits are operable to generate a fine frequency adjustment by determining a phase difference between a last symbol and a sixth symbol of said sync sequence portion of said Bluetooth packet, after said coarse frequency adjustment.
14. The system according to claim 13 , wherein said one or more circuits are operable to generate said fine frequency adjustment based on a sampling instant estimate.
15. The system according to claim 14 , wherein said one or more circuits are operable to determine said sampling instant estimate by correlating contents of said sync sequence portion with expected contents of said sync sequence portion.
16. The system according to claim 15 , wherein said one or more circuits are operable to correlate said contents of said sync sequence portion after said adjustment of said receiver frequency based on said coarse frequency adjustment.
17. A system for signal processing, the system comprising:
one or more circuits in a receiver, wherein said one or more circuits are operable to generate a coarse frequency adjustment for adjusting a frequency of said receiver based on a DC offset estimate generated via DC offset slicing of a data packet;
said one or more circuits operable to generate adjustment of said receiver frequency based on said generated coarse frequency adjustment;
said one or more circuits operable to generate fine frequency adjustment based on a sampling instant estimate; and
said one or more circuits operable to correct said adjusted receiver frequency based on said generated fine frequency adjustment.
18. The system according to claim 17 , wherein said receiver is a Bluetooth receiver that is operable for receiving Bluetooth packets.
19. The system according to claim 17 , wherein said one or more circuits are operable to monitor a header portion of said data packet to determine whether said generated DC offset estimate is outside a threshold value range.
20. The system according to claim 17 , wherein said one or more circuits are operable to generate said fine frequency adjustment by determining a phase difference between a last symbol and a sixth symbol of a sync sequence portion of said data packet.
21. The system according to claim 17 , wherein said one or more circuits are operable to determine said sampling instant estimate by correlating contents of a sync sequence portion of said data packet with expected contents of said sync sequence portion.
22. The system according to claim 21 , wherein said one or more circuits are operable to correlate said contents of said sync sequence portion of said data packet after said adjustment of said receiver frequency based on said coarse frequency adjustment.
23. The system according to claim 17 , wherein said one or more circuits are operable to estimate said coarse frequency adjustment for said receiver frequency during a frequency shift key (FSK) portion of said data packet.
24. The system according to claim 17 , wherein said one or more circuits are operable to generate a coarse frequency adjustment signal to increase said receiver frequency.
25. The system according to claim 17 , wherein said one or more circuits are operable to generate a coarse frequency adjustment signal to decrease said receiver frequency.
26. The system according to claim 17 , wherein said one or more circuits are operable to generate a fine frequency adjustment signal to increase said receiver frequency.
27. The system according to claim 17 , wherein said one or more circuits are operable to generate a fine frequency adjustment signal to decrease said receiver frequency.
28. The system according to claim 17 , wherein said one or more circuits are operable to generate said DC offset estimate via DC offset slicing.