Semiconductor device with buffer layer
View Patent ↗A semiconductor device in one embodiment includes a depletion junction, a peripheral region adjacent the depletion junction, and a buffer layer. The buffer layer is adapted to reduce localization of avalanche breakdown proximate the interface between the depletion junction and the peripheral region.
1. A device comprising:
a first semiconductor layer having a first concentration of dopant of a first type;
a second semiconductor layer, disposed on the first semiconductor layer, and having a graded concentration of dopant of the first type;
a third semiconductor layer, disposed on the second semiconductor layer opposite the first semiconductor layer, and having a second concentration of dopant of the first type that is less than the first concentration of dopant, wherein the graded concentration of the second semiconductor layer is between the first concentration of dopant and the second concentration of dopant, wherein the width of second semiconductor layer is between ten and forty five percent of the width of the third semiconductor layer, wherein the doping profile of the second semiconductor layer has a concentration approximately equal to the doping concentration in the third semiconductor layer proximate the third semiconductor layer, and wherein the doping concentration of the second semiconductor layer is between five and twenty times greater than the doping concentration of the third semiconductor layer proximate the first semiconductor layer;
a guard region, disposed in the third semiconductor layer opposite the second semiconductor layer, and having a concentration of dopant of a second type, wherein the width and smooth doping profile of the second semiconductor layer reduces an electric field proximate the guard region; and
a first metal layer, disposed on the third semiconductor layer opposite the second semiconductor layer proximate the guard region and forming a Schottky junction with the third semiconductor layer.
2. The device of claim 1 , wherein the graded concentration of the second semiconductor layer reduces the electric field proximate the Schottky junction.
3. The device of claim 1 , wherein the graded concentration of the second semiconductor layer reduces a double-injection phenomenon proximately the Schottky junction.
4. The device of claim 1 , wherein:
the dopant of the first type comprises phosphorous or arsenic; and
the dopant of the second type comprises boron.
5. The device of claim 4 , wherein:
the concentration of dopant in the first semiconductor layer is in the range of approximately 1.0E17 cm −3 to 1.0E22 cm −3 ;
the concentration of dopant in the second semiconductor layer is in the range of approximately 1.0E12 cm −3 to 1.0E17 cm −3 ; and
the concentration of dopant in the guard region is in the range of approximately 1.0E17 cm −3 to 1.0E22 cm −3 .
6. The device of claim 5 , wherein the graded concentration of dopant in the second semiconductor layer proximate the first semiconductor layer is approximately in the range of 1.0E12 cm −3 to 1.0E17 cm −3 , and proximate the second semiconductor layer is approximately in the range of 1.0E13 cm −3 to 1.0E18 cm −3 .
7. The device of claim 1 , wherein:
the dopant of the first type comprises boron; and
the dopant of the second type comprises phosphorous or arsenic.
8. A semiconductor device comprising:
a depletion junction;
a peripheral region adjacent the depletion junction; and
a buffer layer for reducing localization of avalanche breakdown proximate an interface between the depletion junction and the peripheral region, wherein the width and a smooth graded doping profile of the buffer layer reduces an electric field proximate the peripheral region adjacent the depletion junction.
9. The semiconductor device of claim 8 , wherein the depletion junction comprises a junction between a p-type semiconductor and an n-type semiconductor.
10. The semiconductor device of claim 8 , wherein the depletion junction comprises a junction between a semiconductor and a metal.
11. The semiconductor device of claim 8 , wherein the buffer layer comprises a substantial linear doping profile.
12. The semiconductor device of claim 11 , wherein the smooth graded doping profile of the buffer layer reduces localization of avalanche breakdown proximate the interface.
13. The semiconductor device of claim 8 , wherein the semiconductor device comprises a diode.
14. The semiconductor device of claim 8 , wherein the semiconductor device comprises a Schottky diode.
15. The semiconductor device of claim 8 , wherein the semiconductor device comprises a rectifier.