Reference current circuit
View Patent ↗Provided is a reference current circuit able to reduce temperature dependence of the reference current even in a case of using a resistor with extremely low temperature-dependent resistance. The reference current circuit comprises a non-inverting amplifier circuit 110 receiving a temperature-compensated reference voltage V BG and generating a voltage V out1 at an output point; a current source circuit 120 composed of a transistor Q 1 connected to the output point via a resistor and a transistor Q 2 receiving a voltage equal to a voltage V BE1 generated across terminals of Q 1 and generating a corresponding current. The circuit 110 (i) includes a third transistor Q 3 , a voltage V BE3 generated across terminals of which has the same temperature characteristic as the voltage V BE1 , and (ii) is configured such that V out1 is a sum of (a) a temperature-compensated voltage component based on V BG and (b) a voltage component equal-to-the voltage V BE3 .
1. A reference current circuit comprising:
a voltage generating circuit configured to generate, from a reference voltage which is temperature-compensated, a predetermined voltage at an output point; and
a current source circuit including a current mirror composed of a first semiconductor device connected to the output point via a resistor and a second semiconductor device which, as a result of receiving a voltage equal to a voltage across terminals of the first semiconductor device, generates a current corresponding to the received voltage, wherein:
the voltage generating circuit (i) includes a third semiconductor device, a voltage across terminals of which has a temperature characteristic identical to the temperature characteristic of the voltage across the terminals of the first semiconductor device, an amplifier circuit, a first resistor, and a second resistor, the amplifier circuit having an inverting input terminal, a non-inverting input terminal, and an output terminal, and (ii) is configured such that (a) the reference voltage is input to the non-inverting input terminal, (b) a voltage at the output terminal is output as the predetermined voltage, (c) the first resistor is inserted in a first wiring connecting the inverting input terminal and a ground terminal, (d) the second resistor is inserted in a second wiring connecting the output terminal and the inverting input terminal, and (e) the third semiconductor device is inserted in the second wiring.
2. The reference current circuit of claim 1 , wherein
the voltage generating circuit is composed of a non-inverting amplifier circuit, a feedback path of which includes the third semiconductor device therein.
3. The reference current circuit of claim 1 , wherein
the first and the third semiconductor devices are both diode-connected bipolar transistors.
4. The reference current circuit of claim 1 , wherein
the first and the third semiconductor devices are both P-N junction diodes.
5. The reference current circuit of claim 1 , wherein
the first and the third semiconductor devices are both diode-connected MOS transistors.
6. A reference current circuit comprising:
a voltage generating circuit operable to generate, from a reference voltage which is temperature-compensated, a predetermined voltage at an output point; and
a current source circuit including a current mirror composed of a first semiconductor device connected to the output point via a resistor and a second semiconductor device which, as a result of receiving a voltage equal to a voltage across terminals of the first semiconductor device, generates a current corresponding to the received voltage, wherein:
the voltage generating circuit (i) includes a third semiconductor device, a voltage across terminals of which has a temperature characteristic identical to the temperature characteristic of the voltage across the terminals of the first semiconductor devices,
a voltage follower and a resistor, and (ii) is configured such that (a) the resistor is inserted in a wiring connecting a power supply terminal and an input point of the voltage follower, (b) the third semiconductor device is inserted in a wiring connecting a receiving point of the reference voltage and the input point of the voltage follower, and (c) a voltage at an output point of the voltage follower is output as the predetermined voltage.
7. The reference current circuit of claim 6 , wherein
the first and the third semiconductor devices are both diode-connected bipolar transistors.
8. The reference current circuit of claim 6 , wherein
the first and the third semiconductor devices are both P-N junction diodes.
9. The reference current circuit of claim 6 , wherein
the first and the third semiconductor devices are both diode-connected MOS transistors.
10. The reference current circuit of claim 6 , wherein
the resistor is one of (i) a bipolar transistor, a base of which receives a bias voltage input, and (ii) a MOS transistor, a gate of which receives a bias voltage input.
11. A reference current circuit comprising:
a voltage generating circuit operable to generate, from a reference voltage which is temperature-compensated, a predetermined voltage at an output point; and
a current source circuit including a current mirror composed of a first semiconductor device connected to the output point via a ,resistor and a second semiconductor device which, as a result of receiving a voltage equal to a voltage across terminals of the first semiconductor device generates a current corresponding to the received voltage, wherein:
the voltage generating circuit (i) includes a third semiconductor device, a voltage across terminals of which has a temperature characteristic identical to the temperature characteristic of the voltage across the terminals of the first semiconductor device,
a first inverting amplifier circuit, a second inverting amplifier circuit, and a resistor, and (ii) is configured such that (a) the resistor and the third semiconductor device are sequentially inserted in a wiring connecting from a power supply terminal to a ground terminal, (b) a voltage at a middle point between the resistor and the third semiconductor device on the wiring is input to the first inverting amplifier circuit, (c) an output voltage of the first inverting amplifier circuit is input to the second inverting amplifier circuit, (d) an output voltage of the second inverting amplifier circuit is output as the predetermined voltage, (e) a ground voltage is input to a non-inverting input terminal of the first inverting amplifier circuit, and (f) the reference voltage is input to a non-inverting input terminal of the second inverting amplifier circuit.
12. The reference current circuit of claim 11 , wherein
the first and the third semiconductor devices are both diode-connected bipolar transistors.
13. The reference current circuit of claim 11 , wherein
the first and the third semiconductor devices are both P-N junction diodes.
14. The reference current circuit of claim 11 , wherein
the first and the third semiconductor devices are both diode-connected MOS transistors.
15. The reference current circuit of claim 11 , wherein
the resistor is one of (i) a bipolar transistor, a base of which receives a bias voltage input, and (ii) a MOS transistor, a gate of which receives a bias voltage input.