Semiconductor device
View Patent ↗A semiconductor device includes a phase compensation circuit 6 using a MOS capacitor with a structure in which an insulating film is disposed between a gate electrode formed on a semiconductor substrate and a diffusion layer. The phase compensation circuit includes first and second MOS capacitors 14, 15 . A gate electrode terminal of the first MOS capacitor is connected equivalently to a diffusion layer terminal of the second MOS capacitor that is a terminal opposite to the gate electrode terminal. A potential difference generating element 16 that generates a potential difference by allowing a current to flow therethrough is connected between a diffusion layer terminal of the first MOS capacitor and a gate electrode terminal of the second MOS capacitor. When the MOS capacitors having the voltage dependence are used, e.g., as a phase compensation circuit element of an operational amplifier, the MOS capacitance is not reduced, no matter the range of the input or output voltage of the operational amplifier, so that the phase margin will not reduced.
1. A semiconductor device comprising a phase compensation circuit using a MOS capacitor with a structure in which an insulating film is disposed between a gate electrode formed on a semiconductor substrate and a diffusion layer,
wherein the phase compensation circuit comprises a first MOS capacitor and a second MOS capacitor,
a gate electrode terminal of the first MOS capacitor is connected to a diffusion layer terminal of the second MOS capacitor that is a terminal opposite to the gate electrode terminal, and
a potential difference generating element that generates a potential difference by allowing a current to flow therethrough is connected between a diffusion layer terminal of the first MOS capacitor and a gate electrode terminal of the second MOS capacitor.
2. The semiconductor device according to claim 1 , wherein a diode is provided as the potential difference generating element, and a forward current is allowed to flow through the diode.
3. The semiconductor device according to claim 1 , wherein the phase compensation circuit is used for phase compensation of an operational amplifier.
4. The semiconductor device according to claim 3 , further comprising:
a differential amplifier; and
a MOS transistor whose gate is driven by an output from the differential amplifier,
wherein the gate electrode terminal of the first MOS capacitor and the diffusion layer terminal of the second MOS capacitor are connected to the gate of the MOS transistor,
either of terminals of the potential difference generating element is connected to a drain of the MOS transistor,
the diffusion layer terminal of the first MOS capacitor is connected to one of the terminals of the potential difference generating element, and
the gate electrode terminal of the second MOS capacitor is connected to the other terminal of the potential difference generating element.
5. The semiconductor device according to claim 3 , further comprising:
a differential amplifier; and
a bipolar transistor whose base is driven by an output from the differential amplifier,
wherein the gate electrode terminal of the first MOS capacitor and the diffusion layer terminal of the second MOS capacitor are connected to the base of the bipolar transistor,
either of terminals of the potential difference generating element is connected to a collector of the bipolar transistor,
the diffusion layer terminal of the first MOS capacitor is connected to one of the terminals of the potential difference generating element, and
the gate electrode terminal of the second MOS capacitor is connected to the other terminal of the potential difference generating element.
6. The semiconductor device according to claim 4 , wherein a negative-feedback path is provided from an intermediate point or either of the terminals of the potential difference generating element to an input of the differential amplifier.
7. The semiconductor device according to claim 5 , wherein a negative-feedback path is provided from an intermediate point or either of the terminals of the potential difference generating element to an input of the differential amplifier.