Semiconductor photodiode and method of manufacture thereof
View Patent ↗A method of manufacture of an avalanche photodiode involving a step of making a recess in a top window layer of an avalanche photodiode layer stack, such that a wall surrounding the recess runs smoothly and gradually from the level of the recess to the level of the window layer. Further, diffusing a dopant over the entire window layer area so as to form a p-n junction at the bottom of the recess, and providing a first electrical isolation region around the recess by buried ion implantation or wet oxidation in order to limit the flow of electrical current to the p-n junction. Forming an isolation trench around the photodiode and a second electrical isolation region by ion implantation into the trench such that the second electrical isolation region runs through the absorption layer of the photodiode.
1. A semiconductor photodiode, comprising:
a semiconductor substrate;
a stack of layers on said substrate, including an absorption layer and a window layer on the top of the stack;
wherein the window layer has a recess to a predetermined depth and lateral extent, and the recess has a lateral periphery;
wherein the recess has a substantially flat portion, and a wall surrounding the recess runs smoothly and gradually from a level of the recess to a level of a surface of the window layer, so that in operation, the strength of an electric field adjacent to the wall is less than 200% of the strength of an electric field near and under the substantially flat portion of the recess;
wherein the window layer is doped so as to form a doped sub-layer therein, and the doped sub-layer forms, in the recess of the window layer, a p-n junction at a boundary with a next layer in the stack, and wherein said p-n junction defines a photosensitive area of the photodiode; and
a first electrical isolation region surrounding the periphery of the recess, wherein said first electrical isolation region is formed by ion implantation or wet oxidation and is buried underneath the doped sub-layer, so as to confine a flow of electric current to the p-n junction.
2. A semiconductor photodiode of claim 1 further comprising:
an isolation trench in the window layer, wherein said trench surrounds, at a predetermined distance, the periphery of the recess in the window layer; and
a second electrical isolation region in the isolation trench, wherein said second isolation region runs through the absorption layer, and said second isolation region is formed by either ion implantation or wet oxidation.
3. A semiconductor photodiode of claim 1 further comprising a second electrical isolation region surrounding, at a predetermined distance, the periphery of the recess in the window layer and running continuously from the window layer down to a bottom layer of the stack, wherein said second electrical isolation region is formed by multi-energy buried ion implantation or wet oxidation.
4. A semiconductor photodiode of claim 1 wherein the semiconductor photodiode layer stack comprises a p-layer, an i-layer, and an n-layer of a p-i-n photodiode.
5. A semiconductor photodiode of claim 1 wherein the semiconductor photodiode layer stack comprises a multiplication layer, a field-control charge layer, and an absorption layer of an avalanche photodiode.
6. A semiconductor photodiode of claim 1 wherein the substrate is a n-substrate or a Si-substrate.
7. A semiconductor photodiode of claim 4 wherein the absorption layer is InGaAs layer.
8. A semiconductor photodiode of claim 5 wherein the substrate is an n + -InP substrate, the multiplication layer is an InAlAs layer, the field-control charge layer is an InP or an InAlAs layer, the absorption layer is an i-InGaAs layer, and the window layer is a n-InP or InAlAs/InP layer, and wherein the semiconductor layer stack further comprises: a n + -InP and a n + -InAlAs buffer layers located between the substrate and the multiplication layer; and an i-InGaAsP or an InAlGaAs grading layer located between the absorption layer and the window layer.
9. A semiconductor photodiode of claim 1 further comprising:
a passivation layer on top of the window layer, wherein the passivation layer is selected from a group consisting of BCB, polyimide, SiN x , and SiO 2 layers;
vias in the passivation layer, wherein the vias are located around the lateral periphery of the recess; and
a first metal contact layer on top of passivation layer, wherein the first metal contact layer surrounds the periphery of the recess and contacts the doped sub-layer of the window layer through the vias.
10. A semiconductor photodiode of claim 1 wherein the stack of layers forms a resonant optical cavity.
11. A semiconductor photodiode of claim 1 wherein the substrate is coated with a reflective metal coating arranged so as to reflect light which has passed through the absorption layer, back towards said absorption layer.
12. A semiconductor photodiode of claim 1 arranged so as to detect light arriving from the side of the semiconductor substrate.
13. An array of semiconductor photodiodes of claim 1 consisting of two or more photodiodes.
14. A semiconductor photodiode of claim 9 further comprising a second metal contact layer, wherein said second metal contact layer is electrically coupled to the semiconductor substrate.
15. A semiconductor photodiode of claim 14 wherein the second metal contact layer is located on the same side of the substrate as the first metal contact layer.