PIEZOELECTRIC OSCILLATOR
For a piezoelectric oscillator according to the present invention, an oscillator circuit includes: a piezoelectric vibrator; an NMOS transistor and a PMOS transistor that constitute an amplifier connected in parallel to the piezoelectric vibrator; and load capacitors connected in parallel to the piezoelectric vibrator. The gate terminals of the NMOS transistor and the PMOS transistor, which are constituents of the amplifier, are connected by a DC cut capacitor, and the gate terminal of the NMOS transistor and the output terminal of the amplifier are connected by a feedback resistor. An arbitrary bias voltage, to be applied to the gate terminal of the PMOS transistor via a high-frequency elimination resistor, is generated by a circuit provided by a diode-connected, second PMOS transistor.
1 . A piezoelectric oscillator, comprising:
an amplifier connected in parallel to a piezoelectric vibrator; and
an load capacitor connected in parallel to the piezoelectric vibrator,
wherein the amplifier includes:
an inverter comprised of a first PMOS transistor and an NMOS transistor that are connected in series;
a DC cut capacitor connected between a gate terminal of the first PMOS transistor and a gate terminal of the NMOS transistor; and
a feedback resistor connected between the gate terminal of the NMOS transistor and an output terminal of the amplifier; and
wherein a bias voltage that is smaller than half of a source voltage of the inverter is to be applied to the gate terminal of the first PMOS transistor.
2 . The piezoelectric oscillator according to claim 1 , further comprising:
a high-frequency elimination resistor connected to the gate terminal of the first PMOS transistor,
wherein the bias voltage is to be applied via the high-frequency elimination resistor.
3 . The piezoelectric oscillator according to claim 1 , further comprising:
a bias voltage generator circuit generating the bias voltage,
wherein the bias voltage generator circuit includes:
a second PMOS transistor that is diode-connected, and
a current source connected in series to the second PMOS transistor.
4 . The piezoelectric oscillator according to claim 3 , wherein:
the source voltage of the first PMOS transistor is equal to a source voltage of the second PMOS transistor;
a gate-source voltage of the first PMOS transistor is equal to a gate-source voltage of the second PMOS transistor:
a gate width of the first PMOS transistor is larger than a gate width of the second PMOS transistor; and
a gate length of the first PMOS transistor is smaller than a gate width of the second PMOS transistor.
5 . The piezoelectric oscillator according to claim 4 , wherein a current value of the current source is set so that the bias voltage becomes smaller than half of the source voltage of the inverter.
6 . The piezoelectric oscillator according to claim 1 , further comprising:
a bias voltage generator circuit for generating the bias voltage,
wherein the bias voltage generator circuit includes
a second PMOS transistor that is diode-connected, and
a load resistor connected in series to the second PMOS transistor.
7 . A piezoelectric oscillator comprising:
an amplifier connected in parallel to a piezoelectric vibrator; and
a load capacitor connected in parallel to the piezoelectric vibrator,
wherein the amplifier includes:
an inverter that is comprised of a PMOS transistor and an NPN transistor connected in series,
a DC cut capacitor connected between a gate terminal of the PMOS transistor and a base terminal of the NPN transistor, and
a feedback resistor connected between the base terminal of the NPN transistor and an output terminal of the amplifier, and
wherein a bias voltage that is smaller than half of a source voltage of the inverter is to be applied to the gate terminal of the PMOS transistor.
8 . A piezoelectric oscillator, comprising:
an amplifier connected in parallel to a piezoelectric vibrator; and
an load capacitor connected in parallel to the piezoelectric vibrator,
wherein the amplifier includes:
an inverter that is comprised of a first NMOS transistor and an PMOS transistor that are connected in series,
a DC cut capacitor connected between a gate terminal of the first NMOS transistor and a gate terminal of the PMOS transistor and
a feedback resistor connected between the gate terminal of the PMOS transistor and an output terminal of the amplifier, and
wherein a bias voltage that is larger than half of a source voltage of the inverter is to be applied to the gate terminal of the first NMOS transistor.
9 . The piezoelectric oscillator according to claim 8 , further comprising:
a high-frequency elimination resistor connected to the gate terminal of the first NMOS transistor,
wherein the bias voltage is to be applied via the high-frequency elimination resistor.
10 . The piezoelectric oscillator according to claim 8 , further comprising:
a bias voltage generator circuit generating the bias voltage,
wherein the bias voltage generator circuit includes:
a second NMOS transistor that is diode-connected, and
a current source connected in series to the second NMOS transistor.
11 . The piezoelectric oscillator according to claim 8 , further comprising:
a bias voltage generator circuit generating the bias voltage,
wherein the bias voltage generator circuit includes:
a second NMOS transistor that is diode-connected, and
a load resistor connected in series to the second NMOS transistor.
12 . A piezoelectric oscillator, comprising:
an amplifier connected in parallel to a piezoelectric vibrator; and
an load capacitor connected in parallel to the piezoelectric vibrator,
wherein the amplifier includes:
an inverter that is comprised of a NMOS transistor and an PNP transistor that are connected in series,
a DC cut capacitor connected between a gate terminal of the NMOS transistor and a base terminal of the PNP transistor and
a feedback resistor connected between the base terminal of the PNP transistor and an output terminal of the amplifier, and
wherein a predetermined bias voltage is to be applied to the gate terminal of the NMOS transistor.