IP Library Granted Patent US 7,827,320
Granted Patent B1
US 7,827,320 · App. 12/058,572 · Granted Nov 2, 2010

Serial ATA device implementing intra-command processing by detecting XRDY primitive while in the XRDY state

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Quick Facts
Patent No.
US 7,827,320
App. No.
12/058,572
Granted
Nov 2, 2010
Kind
B1
Abstract

A Serial Advanced Technology Attachment (SATA) device for communicating with a host is disclosed. The SATA device comprises control circuitry which enters a XRDY state in preparation for sending data to the host, receives a first XRDY from the host while in the XRDY state, and sets a RXRDY flag. After receiving the first XRDY, the control circuitry receives a RRDY from the host while in the XRDY state, transmits a data block to the host in response to the RRDY, and enters an idle state after transmitting the data block to the host. If the RXRDY flag is set while in the idle state, the control circuitry waits for the host to transmit a second XRDY.

Claims (27)

1. A Serial Advanced Technology Attachment (SATA) device for communicating with a host, the SATA device comprising control circuitry operable to:

enter a Transmit Ready (XRDY) state in preparation for sending data to the host;

receive a first XRDY from the host while in the XRDY state and set a Receive/Transmit ready (RXRDY) flag;

after receiving the first XRDY, receive a Receive Ready (RRDY) from the host while in the XRDY state;

transmit a data block to the host in response to the RRDY;

enter an idle state after transmitting the data block to the host; and

if the RXRDY flag is set while in the idle state, wait for the host to transmit a second XRDY,

receive the second XRDY while in the idle state; and

after receiving the second XRDY, receive a Frame Information Structure from the host comprising intra-command data.

2. The SATA device as recited in claim 1 , wherein waiting for the host to transmit the second XRDY comprises waiting for a predetermined time interval.

3. The SATA device as recited in claim 1 , wherein waiting for the host to transmit the second XRDY comprises waiting for a predetermined number of syncs to be received from the host.

4. The SATA device as recited in claim 1 , wherein the control circuitry is further operable to clear the RXRDY flag while in the idle state.

5. The SATA device as recited in claim 1 , wherein the control circuitry is further operable to enter the XRDY state when the second XRDY has not been received from the host.

6. The SATA device as recited in claim 1 , wherein the SATA device comprises a disk drive.

7. A method of a Serial Advanced Technology Attachment (SATA) device communicating with a host, the method comprising:

entering a Transmit Ready (XRDY) state in preparation for sending data to the host;

receiving a first XRDY from the host while in the XRDY state and setting a Receive/Transmit ready (RXRDY) flag;

after receiving the first XRDY, receiving a Receive Ready (RRDY) from the host while in the XRDY state;

transmitting a data block to the host in response to the RRDY;

entering an idle state after transmitting the data block to the host; and

if the RXRDY flag is set while in the idle state, waiting for the host to transmit a second XRDY;

receiving the second XRDY while in the idle state; and

after receiving the second XRDY, receiving a Frame Information Structure from the host comprising intra-command data.

8. The method as recited in claim 7 , wherein waiting for the host to transmit the second XRDY comprises waiting for a predetermined time interval.

9. The method as recited in claim 7 , wherein waiting for the host to transmit the second XRDY comprises waiting for a predetermined number of syncs to be received from the host.

10. The method as recited in claim 7 , further comprising clearing the RXRDY flag while in the idle state.

11. The method as recited in claim 7 , further comprising entering the XRDY state when the second XRDY has not been received from the host.

Assignments (8)
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
RELEASE OF SECURITY INTEREST AT REEL 038744 FRAME 0481 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 058982/0556 →
RELEASE OF SECURITY INTEREST Recorded Mar 5, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 045501/0714 →
SECURITY AGREEMENT Recorded May 17, 2016
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 038744/0481 →
SECURITY AGREEMENT Recorded May 17, 2016
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038744/0281 →
SECURITY AGREEMENT Recorded May 17, 2016
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 038722/0229 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 28, 2008
From: STEVENS, CURTIS E.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 020722/0229 →