IP Library Granted Patent US 8,008,688
Granted Patent B2
US 8,008,688 · App. 12/060,342 · Granted Aug 30, 2011

Photodiode and method of fabrication

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Quick Facts
Patent No.
US 8,008,688
App. No.
12/060,342
Granted
Aug 30, 2011
Kind
B2
Abstract

The present invention provides a highly reliable photodiode, as well as a simple method of fabricating such a photodiode. During fabrication of the photodiode, a grading layer is epitaxially grown on a top surface of an absorption layer, and a blocking layer, for inhibiting current flow, is epitaxially grown on a top surface of the grading layer. The blocking layer is then etched to expose a window region of the top surface of the grading layer. Thus, the etched blocking layer defines an active region of the absorption layer. A window layer is epitaxially regrown on a top surface of the blocking layer and on the window region of the top surface of the grading layer, and is then etched to form a window mesa.

Claims (92)

1. A photodiode comprising:

a substrate of semiconductor material;

a layer stack, disposed on a top surface of the substrate, wherein the layer stack includes a first buffer layer of extrinsic semiconductor material of a first conductivity type, for accommodating lattice mismatch;

an absorption layer of intrinsic semiconductor material, for absorbing light to generate current carriers, disposed on a top surface of the layer stack;

a grading layer of intrinsic semiconductor material, for facilitating current flow, disposed on a top surface of the absorption layer;

a blocking layer of extrinsic semiconductor material of the first conductivity type, for inhibiting current flow, disposed on a top surface of the grading layer with exception of a window region of the top surface of the grading layer, wherein the window region of the top surface of the grading layer is smaller in area than the top surface of the grading layer; and

a window mesa of extrinsic semiconductor material of a second conductivity type, for transmitting light to the absorption layer, disposed only on a window region of a top surface of the blocking layer and on the window region of the top surface of the grading layer, wherein the window region of the top surface of the blocking layer is smaller in area than the top surface of the blocking layer.

2. The photodiode of claim 1 wherein the layer stack consists of the first buffer layer.

3. The photodiode of claim 1 wherein the layer stack further includes:

a second buffer layer of extrinsic semiconductor material of the first conductivity type, for accommodating lattice mismatch, disposed on a top surface of the first buffer layer;

a multiplication layer of semiconductor material, for multiplying current carriers in an avalanche multiplication process, disposed on a top surface of the second buffer layer; and

a field-control layer of extrinsic semiconductor material of the second conductivity type, for controlling an electric field in the multiplication layer, disposed on a top surface of the multiplication layer.

4. The photodiode of claim 1 further comprising a capping layer of extrinsic semiconductor material of the second conductivity type, for ohmic contacting, disposed on a top surface of the window mesa.

5. The photodiode of claim 4 further comprising:

an antireflective layer of insulator material, for inhibiting reflection of light, disposed on a top surface of the capping layer with exception of a contact region of the top surface of the capping layer, on a side surface of the window mesa, and on the top surface of the blocking layer with exception of the window region of the top surface of the blocking layer;

a top contact of metallic material, disposed on the contact region of the top surface of the capping layer; and

a bottom contact of metallic material, disposed on a bottom surface of the substrate.

6. The photodiode of claim 1 further comprising:

a capping ring of extrinsic semiconductor material of the second conductivity type, for ohmic contacting, disposed on a capping region of a top surface of the window mesa;

an antireflective layer of insulator material, for inhibiting reflection of light, disposed on the top surface of the window mesa with exception of the capping region of the top surface of the window mesa, on a side surface of the window mesa, and on the top surface of the blocking layer with exception of the window region of the top surface of the blocking layer;

a top contact of metallic material, disposed on a top surface of the capping ring; and

a bottom contact of metallic material, disposed on a bottom surface of the substrate.

7. The photodiode of claim 1 wherein the layer stack further includes a distributed Bragg reflector (DBR) layer of extrinsic semiconductor material of the first conductivity type, for reflecting light toward the absorption layer, wherein the first buffer layer is disposed on a top surface of the DBR layer.

8. The photodiode of claim 1 further comprising a lower mesa including the blocking layer, the grading layer, the absorption layer, and a top part of the layer stack.

9. The photodiode of claim 4 further comprising:

a lower mesa including the blocking layer, the grading layer, the absorption layer, and a top part of the layer stack;

an antireflective layer of insulator material, for inhibiting reflection of light, disposed on a top surface of the capping layer with exception of a contact region of the top surface of the capping layer, on a side surface of the window mesa, on the top surface of the blocking layer with exception of the window region of the top surface of the blocking layer, on a side surface of the lower mesa, and on a top surface of a bottom part of the layer stack with exception of a contact region of the top surface of the bottom part of the layer stack;

a top contact of metallic material, disposed on the contact region of the top surface of the capping layer; and

a bottom contact of metallic material, disposed on the contact region of the top surface of the bottom part of the layer stack.

10. The photodiode of claim 8 further comprising an implant region, for inhibiting current flow, disposed at a periphery of the lower mesa in the blocking layer, the grading layer, and the absorption layer.

11. The photodiode of claim 4 further comprising:

a lower mesa including the blocking layer, the grading layer, the absorption layer, and a top part of the layer stack;

an antireflective layer of insulator material, for inhibiting reflection of light, disposed on a top surface of the capping layer with exception of a contact region of the top surface of the capping layer, on a side surface of the window mesa, and on the top surface of the blocking layer with exception of the window region of the top surface of the blocking layer;

a passivation layer of insulator material, for passivating exposed surfaces, disposed on a side surface of the lower mesa, and on a top surface of a bottom part of the layer stack with exception of a contact region of the top surface of the bottom part of the layer stack;

a top contact of metallic material, disposed on the contact region of the top surface of the capping layer; and

a bottom contact of metallic material, disposed on the contact region of the top surface of the bottom part of the layer stack.

12. The photodiode of claim 4 further comprising:

an antireflective layer of insulator material, for inhibiting reflection of light, disposed on a bottom surface of the substrate with exception of a contact region of the bottom surface of the substrate;

a reflective top contact of metallic material, for reflecting light toward the absorption layer, disposed on the top surface of the capping layer;

a bottom contact of metallic material, disposed on the contact region of the bottom surface of the substrate.

13. The photodiode of claim 12 wherein the substrate includes a microlens, for focusing light toward the absorption layer, disposed on the bottom surface of the substrate.

14. A method of fabricating a photodiode comprising steps of:

a) providing a substrate of semiconductor material;

b) epitaxially growing a layer stack on a top surface of the substrate, wherein epitaxially growing the layer stack includes epitaxially growing a buffer layer of extrinsic semiconductor material of a first conductivity type, for accommodating lattice mismatch;

c) epitaxially growing an absorption layer of intrinsic semiconductor material, for absorbing light to generate current carriers, on a top surface of the layer stack;

d) epitaxially growing a grading layer of intrinsic semiconductor material, for facilitating current flow, on a top surface of the absorption layer;

e) epitaxially growing a blocking layer of extrinsic semiconductor material of the first conductivity type, for inhibiting current flow, on a top surface of the grading layer;

f) etching the blocking layer to expose a window region of the top surface of the grading layer, wherein the window region of the top surface of the grading layer is smaller in area than the top surface of the grading layer;

g) epitaxially regrowing a window layer of extrinsic semiconductor material of a second conductivity type on a top surface of the blocking layer and on the window region of the top surface of the grading layer; and

h) etching the window layer to form a window mesa, for transmitting light to the absorption layer, and to expose the top surface of the blocking layer with exception of a window region of the top surface of the blocking layer, wherein the window region of the top surface of the blocking layer is smaller in area than the top surface of the blocking layer, such that the window mesa is disposed only on the window region of the top surface of the blocking layer and on the window region of the top surface of the grading layer.

15. The method of claim 14 wherein step b) further includes:

epitaxially growing a second buffer layer of extrinsic semiconductor material of the first conductivity type, for accommodating lattice mismatch, on a top surface of the first buffer layer;

epitaxially growing a multiplication layer of semiconductor material, for multiplying current carriers in an avalanche multiplication process, on a top surface of the second buffer layer; and

epitaxially growing a field-control layer of extrinsic semiconductor material of the second conductivity type, for controlling an electric field in the multiplication layer, on a top surface of the multiplication layer.

16. The method of claim 14 further comprising a step of epitaxially regrowing a capping layer of extrinsic semiconductor material of the second conductivity type, for ohmic contacting, on a top surface of the window layer.

17. The method of claim 16 further comprising steps of:

depositing an antireflective layer of insulator material, for inhibiting reflection of light, on a top surface of the capping layer, on a side surface of the window mesa, and on the top surface of the blocking layer with exception of the window region of the top surface of the blocking layer;

etching the antireflective layer to expose a contact region of the top surface of the capping layer;

depositing a top contact of metallic material on the contact region of the top surface of the capping layer; and

depositing a bottom contact of metallic material on a bottom surface of the substrate.

18. The method of claim 16 further comprising steps of:

etching the capping layer to form a capping ring, for ohmic contacting, on a capping region of the top surface of the window mesa;

depositing an antireflective layer of insulator material, for inhibiting reflection of light, on a top surface of the capping ring, on a top surface of the window mesa with exception of the capping region of the top surface of the window mesa, on a side surface of the window mesa, and on the top surface of the blocking layer with exception of the window region of the top surface of the blocking layer;

etching the antireflective layer to expose the top surface of the capping ring;

depositing a top contact of metallic material on the top surface of the capping ring; and

depositing a bottom contact of metallic material on a bottom surface of the substrate.

19. The method of claim 14 wherein step b) further includes epitaxially growing a distributed Bragg reflector (DBR) layer of extrinsic semiconductor material of the first conductivity type, for reflecting light toward the absorption layer, prior to epitaxially growing the first buffer layer on a top surface of the DBR layer.

20. The method of claim 14 further comprising a step of etching the blocking layer, the grading layer, the absorption layer, and a top part of the layer stack to form a lower mesa and to expose a top surface of a bottom part of the layer stack.

21. The method of claim 16 further comprising steps of:

etching the blocking layer, the grading layer, the absorption layer, and a top part of the layer stack to form a lower mesa and to expose a top surface of a bottom part of the layer stack;

depositing an antireflective layer of insulator material, for inhibiting reflection of light, on a top surface of the capping layer, on a side surface of the window mesa, on the top surface of the blocking layer with exception of the window region of the top surface of the blocking layer, on a side surface of the lower mesa, and on the top surface of the bottom part of the layer stack;

etching the antireflective layer to expose a contact region of the top surface of the capping layer and a contact region of the top surface of the bottom part of the layer stack;

depositing a top contact of metallic material on the contact region of the top surface of the capping layer; and

depositing a bottom contact of metallic material on the contact region of the top surface of the bottom part of the layer stack.

22. The method of claim 20 further comprising a step of implanting ions into the blocking layer, the grading layer, and the absorption layer to form an implant region, for inhibiting current flow, at a periphery of the lower mesa in the blocking layer, the grading layer, and the absorption layer.

23. The method of claim 16 further comprising steps of:

depositing an antireflective layer of insulator material, for inhibiting reflection of light, on a top surface of the capping layer, on a side surface of the window mesa, and on the top surface of the blocking layer with exception of the window region of the top surface of the blocking layer;

etching the blocking layer, the grading layer, the absorption layer, and a top part of the layer stack to form a lower mesa and to expose a top surface of a bottom part of the layer stack;

depositing a passivation layer of insulator material, for passivating exposed surfaces, on a side surface of the lower mesa, and on the top surface of the bottom part of the layer stack;

etching the antireflective layer to expose a contact region of the top surface of the capping layer;

etching the passivation layer to expose a contact region of the top surface of the bottom part of the layer stack;

depositing a top contact of metallic material on the contact region of the top surface of the capping layer; and

depositing a bottom contact of metallic material on the contact region of the top surface of the bottom part of the layer stack.

24. The method of claim 16 further comprising steps of:

depositing an antireflective layer of insulator material, for inhibiting reflection of light, on a bottom surface of the substrate;

etching the antireflective layer to expose a contact region on the bottom surface of the substrate;

depositing a reflective top contact of metallic material, for reflecting light toward the absorption layer, on a top surface of the capping layer; and

depositing a bottom contact of metallic material on the contact region of the bottom surface of the substrate.

25. The method of claim 24 further comprising a step of etching the bottom surface of the substrate to form a microlens, for focusing light toward the absorption layer.

26. The photodiode of claim 1 , wherein the blocking layer is epitaxially grown on the top surface of the grading layer and etched to expose the window region of the top surface of the grading layer, and wherein the window mesa is etched from a window layer epitaxially regrown on the top surface of the blocking layer and on the window region of the top surface of the grading layer.

27. The photodiode of claim 1 , wherein the window mesa has a lateral extent smaller than a lateral extent of the photodiode and smaller than a lateral extent of the blocking layer.

28. The photodiode of claim 27 , wherein the window mesa is substantially cylindrical and has a first diameter smaller than the lateral extent of the photodiode and smaller than the lateral extent of the blocking layer, wherein the window region of the top surface of the grading layer is substantially circular and has a second diameter smaller than the first diameter, and wherein the window region of the top surface of the blocking layer is substantially ring- shaped, and has an inner diameter substantially equal to the second diameter and an outer diameter substantially equal to the first diameter.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 22, 2025
From: LUMENTUM OPERATIONS LLC
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 074974/0001 →
RELEASE OF SECURITY INTEREST Recorded Dec 13, 2019
From: DEUTSCHE AG NEW YORK BRANCH
To: OCLARO FIBER OPTICS, INC.; LUMENTUM OPERATIONS LLC; OCLARO, INC.
Reel/Frame 051287/0556 →
PATENT SECURITY AGREEMENT Recorded Dec 11, 2018
From: LUMENTUM OPERATIONS LLC; OCLARO FIBER OPTICS, INC.; OCLARO, INC.
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 047788/0511 →
CORRECTIVE ASSIGNMENT TO CORRECT PATENTS 7,868,247 AND 6,476,312 LISTED ON PAGE A-A33 PREVIOUSLY RECORDED ON REEL 036420 FRAME 0340. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Jan 28, 2016
From: JDS UNIPHASE CORPORATION
To: LUMENTUM OPERATIONS LLC
Reel/Frame 037627/0641 →
CORRECTIVE ASSIGNMENT TO CORRECT INCORRECT PATENTS 7,868,247 AND 6,476,312 ON PAGE A-A33 PREVIOUSLY RECORDED ON REEL 036420 FRAME 0340. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Jan 19, 2016
From: JDS UNIPHASE CORPORATION
To: LUMENTUM OPERATIONS LLC
Reel/Frame 037562/0513 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 21, 2015
From: JDS UNIPHASE CORPORATION
To: LUMENTUM OPERATIONS LLC
Reel/Frame 036420/0340 →